Index: firmware/App/Services/AlarmMgmt.h
===================================================================
diff -u -rb64c49fdcf2b6d95e61e63f8e258c4e600935bbd -ree80ed6cf021fa2d701204dfa9f6b1d1ea4d9b2a
--- firmware/App/Services/AlarmMgmt.h	(.../AlarmMgmt.h)	(revision b64c49fdcf2b6d95e61e63f8e258c4e600935bbd)
+++ firmware/App/Services/AlarmMgmt.h	(.../AlarmMgmt.h)	(revision ee80ed6cf021fa2d701204dfa9f6b1d1ea4d9b2a)
@@ -1,18 +1,19 @@
-/**********************************************************************//**
- *
- *  Copyright (c) 2019-2020 Diality Inc. - All Rights Reserved.
- *
- *  THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
- *  WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
- *
- *  @file AlarmMgmt.h
- *
- *  @date 07-Nov-2019
- *  @author S. Nash
- *
- *  @brief header file for Alarm Management service module.
- *
- **************************************************************************/
+/**************************************************************************
+*
+* Copyright (c) 2019-2020 Diality Inc. - All Rights Reserved.
+*
+* THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
+* WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
+*
+* @file AlarmMgmt.h
+*
+* @author (last) Quang Nguyen
+* @date (last) 13-Aug-2020
+*
+* @author (original) Sean
+* @date (original) 04-Feb-2020
+*
+***************************************************************************/
 
 #ifndef __ALARM_MGMT_H__
 #define __ALARM_MGMT_H__
@@ -94,34 +95,55 @@
     SW_FAULT_ID_INT_ADC_INVALID_CHANNEL_REQUESTED,
     SW_FAULT_ID_MODE_INIT_POST_INVALID_POST_STATE,
     SW_FAULT_ID_OP_MODES_ILLEGAL_MODE_TRANSITION_REQUESTED,
-    SW_FAULT_ID_OP_MODES_INVALID_MODE_STATE,
+    SW_FAULT_ID_OP_MODES_INVALID_MODE_STATE,                            // 5
     SW_FAULT_ID_OP_MODES_INVALID_MODE_REQUESTED,
     SW_FAULT_ID_OP_MODES_INVALID_MODE_TO_TRANSITION_TO,
     SW_FAULT_ID_ALARM_MGMT_INVALID_ALARM_TO_ACTIVATE,
     SW_FAULT_ID_ALARM_MGMT_INVALID_ALARM_TO_CLEAR,
-    SW_FAULT_ID_COMM_BUFFERS_ADD_TOO_MUCH_DATA,
+    SW_FAULT_ID_COMM_BUFFERS_ADD_TOO_MUCH_DATA,                         // 10
     SW_FAULT_ID_COMM_BUFFERS_ADD_INVALID_BUFFER,
     SW_FAULT_ID_COMM_BUFFERS_GET_INVALID_BUFFER,
     SW_FAULT_ID_COMM_BUFFERS_PEEK_INVALID_BUFFER,
     SW_FAULT_ID_COMM_BUFFERS_COUNT_INVALID_BUFFER,
-    SW_FAULT_ID_FPGA_INVALID_IN_STATE,
+    SW_FAULT_ID_FPGA_INVALID_IN_STATE,                                  // 15
     SW_FAULT_ID_FPGA_INVALID_OUT_STATE,
     SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA,
     SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA,
     SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA,
-    SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA,
+    SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA,                            // 20
     SW_FAULT_ID_MSG_QUEUES_ADD_QUEUE_FULL,
     SW_FAULT_ID_MSG_QUEUES_ADD_INVALID_QUEUE,
     SW_FAULT_ID_MSG_QUEUES_GET_INVALID_QUEUE,
     SW_FAULT_ID_MSG_QUEUES_IS_EMPTY_INVALID_QUEUE,
-    SW_FAULT_ID_MSG_QUEUES_IS_FULL_INVALID_QUEUE,
+    SW_FAULT_ID_MSG_QUEUES_IS_FULL_INVALID_QUEUE,                       // 25
     SW_FAULT_ID_WATCHDOG_INVALID_SELF_TEST_STATE,
     SW_FAULT_ID_RTC_EXEC_INVALID_STATE,
     SW_FAULT_ID_RTC_SELF_TEST_INVALID_STATE,
     SW_FAULT_ID_RTC_TRANSACTION_SERVICE_INVALID_STATE,
-    SW_FAULT_ID_MSG_PENDING_ACK_LIST_FULL,
+    SW_FAULT_ID_MSG_PENDING_ACK_LIST_FULL,                              // 30
     SW_FAULT_ID_PI_CTRL_INVALID_CONTROLLER,
     SW_FAULT_ID_PI_CTRL_INVALID_SIGNAL,
+    SW_FAULT_ID_NVDATAMGMT_EXEC_INVALID_STATE,
+    SW_FAULT_ID_NVDATAMGMT_INVALID_SELF_TEST_STATE,
+    SW_FAULT_ID_TEMPERATURE_SENSORS_INVALID_SELF_TEST_STATE,            // 35
+    SW_FAULT_ID_TEMPERATURE_SENSORS_EXEC_INVALID_STATE,
+    SW_FAULT_ID_HEATERS_SELF_TEST_INVALID_STATE,
+    SW_FAULT_ID_HEATERS_PRIMARY_HEATER_EXEC_INVALID_STATE,
+    SW_FAULT_ID_HEATERS_TRIMMER_HEATER_EXEC_INVALID_STATE,
+    SW_FAULT_ID_VALVES_INVALID_VALVE_STATE_NAME,                        // 40
+    SW_FAULT_ID_VALVES_INVALID_VALVE_ID,
+    SW_FAULT_ID_CAN_PARITY_ERROR,
+    SW_FAULT_ID_CAN_PASSIVE_WARNING,
+    SW_FAULT_ID_CAN_OFF_ERROR,
+    SW_FAULT_ID_FPGA_UART_FRAME_ERROR,                                  // 45
+    SW_FAULT_ID_FPGA_UART_OVERRUN_ERROR,
+    SW_FAULT_ID_UTIL_TIME_WINDOWED_COUNT_ERROR,
+    SW_FAULT_ID_ACCEL_INVALID_STATE,
+    SW_FAULT_ID_ACCEL_GET_INVALID_AXIS,
+    SW_FAULT_ID_ACCEL_GET_MAX_INVALID_AXIS,                             // 50
+    SW_FAULT_ID_ACCEL_INVALID_SELF_TEST_STATE,
+    SW_FAULT_ID_UTIL_INVALID_WIN_COUNT,
+    SW_FAULT_ID_UTIL_INVALID_WIN_MAX_COUNT,
     NUM_OF_SW_FAULT_IDS
 } SW_FAULT_ID_T;
 
@@ -136,9 +158,9 @@
 void clearAlarm( ALARM_ID_T alarm );
 BOOL isAlarmActive( ALARM_ID_T alarm );
 
-/**@}*/
-
 BOOL testSetAlarmStateOverride( U32 alarmID, BOOL value );
 BOOL testResetAlarmStateOverride( U32 alarmID );
+
+/**@}*/
 
 #endif