Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r1aeab08c1baf6445514b81fe51fc60a3e536e782 -ra6e1a62344275a14e4edde1bdda9974eef840827
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 1aeab08c1baf6445514b81fe51fc60a3e536e782)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision a6e1a62344275a14e4edde1bdda9974eef840827)
@@ -82,8 +82,8 @@
 #define FPGA_FLUIDLEAK_STATE_MASK       0x0004                  ///< Bit mask for fluid leak detector.
 
 #define FLUID_DOOR_SWITCH_MASK          0x08                    ///< Fluid door switch bit mask.
-#define CONCENTRATE_CAP_SWITCH_MASK     0x10                    ///< Concentrate cap switch bit mask
-#define DIALYSATE_CAP_SWITCH_MASK       0x20                    ///< Dialysate cap switch bit mask..
+#define DIALYSATE_CAP_SWITCH_MASK       0x10                    ///< Dialysate cap switch bit mask.
+#define CONCENTRATE_CAP_SWITCH_MASK     0x1A                    ///< Concentrate cap switch bit mask.
 #define FPGA_POWER_OUT_TIMEOUT_MS       ( 2 * MS_PER_SECOND )   ///< FPGA power out timeout in milliseconds.
 #define FPGA_GPIO_POWER_STATUS_PIN      7                       ///< FPGA GPIO power status pin
 
@@ -186,6 +186,7 @@
     U16 fpgaFanIn3Pulse;                    ///< Reg 400. Fan inlet 3 pulse time in 2.5 resolution
     U16 fpgaFanOut3Pulse;                   ///< Reg 402. Fan outlet 3 pulse time in 2.5 resolution
     U16 fpgaTimerCount_ms;                  ///< Reg 404. Internal FPGA timer count in ms.
+
     U16 fpgaADCVccInt;                      ///< Reg 406. Internal FPGA Vcc Voltage.
     U16 fpgaADCVccAux;                      ///< Reg 408. Internal FPGA Vcc auxiliary voltage.
     U16 fpgaADCVPVN;                        ///< Reg 410. Internal FPGA VPVN voltage.