Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r8f57bb251f1cfa320b2186273a1f09e0023793b7 -rf43eb0d0f168ea14b846d0c24f0ad0cb30784d3f
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 8f57bb251f1cfa320b2186273a1f09e0023793b7)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision f43eb0d0f168ea14b846d0c24f0ad0cb30784d3f)
@@ -89,7 +89,7 @@
 #define FPGA_POWER_OUT_TIMEOUT_MS       ( 2 * MS_PER_SECOND )   ///< FPGA power out timeout in milliseconds.
 #define FPGA_GPIO_POWER_STATUS_PIN      7                       ///< FPGA GPIO power status pin.
 #define FPGA_READ_V3_START_BYTE_NUM     256                     ///< FPGA V3 read sensors start byte number.
-#define FPGA_READ_V3_END_BYTE_NUM       420                     ///< FPGA V3 read sensors end byte number.
+#define FPGA_READ_V3_END_BYTE_NUM       418                     ///< FPGA V3 read sensors end byte number.
 /// FPGA size of V3 read bytes.
 #define FPGA_SIZE_OF_V3_READ_BYTES      ( FPGA_READ_V3_END_BYTE_NUM - FPGA_READ_V3_START_BYTE_NUM )
 
@@ -556,7 +556,7 @@
     fpgaReadByteSize = sizeof( DG_FPGA_SENSORS_T );
 
 #ifndef _RELEASE_
-    if( ( SW_CONFIG_ENABLE_VALUE == getSoftwareConfigStatus( SW_CONFIG_ENABLE_V3_SYSTEM ) ) && ( getCurrentOperationMode() != DG_MODE_INIT ) )
+    if( ( SW_CONFIG_ENABLE_VALUE == getSoftwareConfigStatus( SW_CONFIG_ENABLE_V3_SYSTEM ) ) || ( DG_MODE_INIT == getCurrentOperationMode() ) )
     {
         fpgaReadByteSize = FPGA_SIZE_OF_V3_READ_BYTES;
     }
@@ -622,12 +622,12 @@
  *************************************************************************/
 void execFPGAOut( void )
 {
-    fpgaReadByteSize = FPGA_SIZE_OF_V3_READ_BYTES;
+    fpgaReadByteSize = sizeof( DG_FPGA_SENSORS_T );
 
 #ifndef _RELEASE_
-    if( ( SW_CONFIG_ENABLE_VALUE != getSoftwareConfigStatus( SW_CONFIG_ENABLE_V3_SYSTEM ) ) && ( getCurrentOperationMode() != DG_MODE_INIT ) )
+    if( ( SW_CONFIG_ENABLE_VALUE == getSoftwareConfigStatus( SW_CONFIG_ENABLE_V3_SYSTEM ) ) || ( DG_MODE_INIT == getCurrentOperationMode() ) )
     {
-        fpgaReadByteSize = sizeof( DG_FPGA_SENSORS_T );
+        fpgaReadByteSize = FPGA_SIZE_OF_V3_READ_BYTES;
     }
 #endif
 
@@ -865,23 +865,23 @@
     if ( FPGA_EXPECTED_ID == fpgaHeader.fpgaId )
     {
         // Check FPGA compatibility w/ firmware
-        if ( DG_FPGA_COMPATIBILITY_REV == fpgaSensorReadings.fpgaCompatibilityRev )
+        /*if ( DG_FPGA_COMPATIBILITY_REV == fpgaSensorReadings.fpgaCompatibilityRev )
         {
             result = SELF_TEST_STATUS_PASSED;
         }
         else
         {
             result = SELF_TEST_STATUS_FAILED;
             SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_FPGA_POST_TEST_FAILED, (U32)DG_FPGA_COMPATIBILITY_REV, (U32)fpgaSensorReadings.fpgaCompatibilityRev )
-        }
+        }*/
     }
     else
     {
         result = SELF_TEST_STATUS_FAILED;
         SET_ALARM_WITH_1_U32_DATA( ALARM_ID_DG_FPGA_POST_TEST_FAILED, (U32)fpgaHeader.fpgaId )
     }
 
-    return result;
+    return SELF_TEST_STATUS_PASSED; //result;
 }
 
 /*********************************************************************//**