Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -rc44d6f39df2b76d453754ffea6597f48c9cfab6f -r61a0c482f98b1a546273659677995e1d692fe2f4
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision c44d6f39df2b76d453754ffea6597f48c9cfab6f)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 61a0c482f98b1a546273659677995e1d692fe2f4)
@@ -107,9 +107,9 @@
 
 #define PROCESSOR_FPGA_CLOCK_DIFF_TOLERANCE     1               ///< Tolerance for processor clock speed check against FPGA clock.
 
-#define MAX_FPGA_COMM_FAILURES_WINDOW_MS ( 1 * SEC_PER_MIN * MS_PER_SECOND ) ///< ///< FPGA comm failures window
-#define MAX_FPGA_COMM_FAILURES           3                       ///< FPGA maximum comm failures per MAX_FPGA_COMM_FAILURES_WINDOW_MS
-#define MIN_POWER_ON_TIME_FOR_COMM_FAILS ( 1 * MS_PER_SECOND )   ///< Allow FPGA comm errors for first second after power-up
+#define MAX_FPGA_COMM_FAILURES_WINDOW_MS ( 1 * SEC_PER_MIN * MS_PER_SECOND ) ///< FPGA comm failures window
+#define MAX_FPGA_COMM_FAILURES           3                                   ///< FPGA maximum comm failures per MAX_FPGA_COMM_FAILURES_WINDOW_MS
+#define MIN_POWER_ON_TIME_FOR_COMM_FAILS ( 1 * MS_PER_SECOND )               ///< Allow FPGA comm errors for first second after power-up
 
 // FPGA header struct.
 #pragma pack(push,1)