Index: firmware/include/adc.h =================================================================== diff -u -reff7b1575f008f81b29ef906f6346fac6012d3ab -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 --- firmware/include/adc.h (.../adc.h) (revision eff7b1575f008f81b29ef906f6346fac6012d3ab) +++ firmware/include/adc.h (.../adc.h) (revision f068446fdb7889d320ddb6ffbd58f347ce0501e7) @@ -229,8 +229,31 @@ uint32 CONFIG_PARCR; }adc_config_reg_t; +#define ADC1_OPMODECR_CONFIGVALUE 0x81140001U +#define ADC1_CLOCKCR_CONFIGVALUE (25U) +#define ADC1_G0MODECR_CONFIGVALUE ((uint32)ADC_12_BIT | (uint32)0x00000000U | (uint32)0x00000000U) +#define ADC1_G1MODECR_CONFIGVALUE ((uint32)ADC_12_BIT | (uint32)0x00000020U | (uint32)0x00000000U | (uint32)0x00000000U) +#define ADC1_G2MODECR_CONFIGVALUE ((uint32)ADC_12_BIT | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)0x00000000U) +#define ADC1_G0SRC_CONFIGVALUE ((uint32)0x00000000U | (uint32)ADC1_EVENT) +#define ADC1_G1SRC_CONFIGVALUE ((uint32)0x00000000U | (uint32)ADC1_EVENT) +#define ADC1_G2SRC_CONFIGVALUE ((uint32)0x00000000U | (uint32)ADC1_EVENT) + +#define ADC1_BNDCR_CONFIGVALUE ((uint32)((uint32)0U << 16U)|(0U + 3U)) +#define ADC1_BNDEND_CONFIGVALUE (2U) + +#define ADC1_G0SAMP_CONFIGVALUE (0U) +#define ADC1_G1SAMP_CONFIGVALUE (0U) +#define ADC1_G2SAMP_CONFIGVALUE (0U) + +#define ADC1_G0SAMPDISEN_CONFIGVALUE ((uint32)((uint32)0U << 8U) | 0x00000000U) +#define ADC1_G1SAMPDISEN_CONFIGVALUE ((uint32)((uint32)0U << 8U) | 0x00000000U) +#define ADC1_G2SAMPDISEN_CONFIGVALUE ((uint32)((uint32)0U << 8U) | 0x00000000U) + +#define ADC1_PARCR_CONFIGVALUE (0x00000005U) + + /** * @defgroup ADC ADC * @brief Analog To Digital Converter Module. @@ -261,6 +284,8 @@ void adcSetEVTPin(adcBASE_t *adc, uint32 value); uint32 adcGetEVTPin(adcBASE_t *adc); +void adc1GetConfigValue(adc_config_reg_t *config_reg, config_value_type_t type); +void adc2GetConfigValue(adc_config_reg_t *config_reg, config_value_type_t type); /** @fn void adcNotification(adcBASE_t *adc, uint32 group) * @brief Group notification