Index: firmware/include/het.h
===================================================================
diff -u -reff7b1575f008f81b29ef906f6346fac6012d3ab -rc48569a478d727afa7cd69aadb396814248c83f9
--- firmware/include/het.h	(.../het.h)	(revision eff7b1575f008f81b29ef906f6346fac6012d3ab)
+++ firmware/include/het.h	(.../het.h)	(revision c48569a478d727afa7cd69aadb396814248c83f9)
@@ -331,9 +331,274 @@
 	uint32 CONFIG_PCR;	
 } het_config_reg_t;
 
+/* Configuration registers initial value for HET1*/
+#define HET1_DIR_CONFIGVALUE     ((uint32)0x80000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x10000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00400000U \
+                                | (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00080000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00020000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00008000U \
+								| (uint32)0x00004000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000008U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000002U \
+								| (uint32)0x00000001U)
 
+#define HET1_PDR_CONFIGVALUE     ((uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x01000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)
+								
+#define HET1_PULDIS_CONFIGVALUE  ((uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x01000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)								
+								
+#define HET1_PSL_CONFIGVALUE     ((uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x01000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+                                | (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00080000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00020000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00008000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000800U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)								
+								
+#define HET1_HRSH_CONFIGVALUE    ((uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00001000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000008U \
+								| (uint32)0x00000004U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)
 
+#define HET1_AND_CONFIGVALUE     ((uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)								
+								
+#define HET1_XOR_CONFIGVALUE     ((uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)								
+								
+#define HET1_PFR_CONFIGVALUE    (((uint32)7U << 8U) | (uint32)0U)
 
+
+#define HET1_PRY_CONFIGVALUE     ((uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)
+								
+#define HET1_INTENAC_CONFIGVALUE ((uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)
+								
+#define HET1_INTENAS_CONFIGVALUE ((uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U \
+								| (uint32)0x00000000U)
+
+#define HET1_PCR_CONFIGVALUE     ((uint32)0x00000005U)
+#define HET1_GCR_CONFIGVALUE      0x00030001U
+
+
+
+
 /** 
  *  @defgroup HET HET
  *  @brief HighEnd Timer Module.
@@ -378,6 +643,7 @@
 /* Timestamp Interface Functions */
 void   hetResetTimestamp(hetRAMBASE_t * hetRAM);
 uint32 hetGetTimestamp(hetRAMBASE_t * hetRAM);
+void het1GetConfigValue(het_config_reg_t *config_reg, config_value_type_t type);
 
 /** @fn void hetNotification(hetBASE_t *het, uint32 offset)
 *   @brief het interrupt callback