Index: firmware/source/can.c =================================================================== diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r36a2fa774e2f5721c30261a40360d706bb4ea4bb --- firmware/source/can.c (.../can.c) (revision f068446fdb7889d320ddb6ffbd58f347ce0501e7) +++ firmware/source/can.c (.../can.c) (revision 36a2fa774e2f5721c30261a40360d706bb4ea4bb) @@ -104,9 +104,9 @@ * - Disable status interrupts * - Enter initialization mode */ - canREG1->CTL = (uint32)0x00000000U + canREG1->CTL = (uint32)0x00000200U | (uint32)0x00000000U - | (uint32)((uint32)0x00000005U << 10U) + | (uint32)((uint32)0x0000000AU << 10U) | (uint32)0x00020043U; /** - Clear all pending error flags and reset current status */ @@ -180,7 +180,7 @@ | (uint32)0x00000000U; /** - Setup auto bus on timer period */ - canREG1->ABOTR = (uint32)0U; + canREG1->ABOTR = (uint32)1033350U; /** - Initialize message 1 * - Wait until IF1 is ready for use @@ -196,8 +196,8 @@ } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x1U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x1U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 1U; @@ -215,8 +215,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x2U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x2U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 2U; @@ -234,8 +234,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x4U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x4U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 3U; @@ -253,8 +253,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x8U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x8U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 4U; @@ -272,8 +272,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x10U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x10U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 5U; @@ -291,8 +291,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x40U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x40U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 6U; @@ -310,8 +310,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x80U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x80U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 7U; @@ -329,8 +329,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x200U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x100U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 8U; @@ -348,8 +348,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x402U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x402U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 9U; @@ -367,9 +367,9 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x403U & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x403U & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 10U;