Index: firmware/source/mibspi.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/source/mibspi.c	(.../mibspi.c)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/source/mibspi.c	(.../mibspi.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -482,7 +482,7 @@
                     | (uint32)((uint32)0U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO[0] */
-                    | (uint32)((uint32)0U << 11U)  /* SOMI[0] */
+                    | (uint32)((uint32)1U << 11U)  /* SOMI[0] */
                     | (uint32)((uint32)0U << 17U)  /* SIMO[1] */
                     | (uint32)((uint32)0U << 25U); /* SOMI[1] */
 
@@ -529,7 +529,7 @@
                     | (uint32)((uint32)0U << 25U); /* SOMI[1] */
 
     /* MIBSPI1 set all pins to functional */
-    mibspiREG1->PC0 = (uint32)((uint32)1U << 0U)  /* SCS[0] */
+    mibspiREG1->PC0 = (uint32)((uint32)0U << 0U)  /* SCS[0] */
                     | (uint32)((uint32)0U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)0U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)0U << 3U)  /* SCS[3] */
@@ -538,7 +538,7 @@
                     | (uint32)((uint32)1U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)0U << 10U)  /* SIMO[0] */
-                    | (uint32)((uint32)1U << 11U)  /* SOMI[0] */
+                    | (uint32)((uint32)0U << 11U)  /* SOMI[0] */
                     | (uint32)((uint32)1U << 17U)  /* SIMO[1] */
                     | (uint32)((uint32)1U << 25U); /* SOMI[1] */
 
@@ -1006,11 +1006,11 @@
 
     /* MIBSPI3 set all pins to functional */
     mibspiREG3->PC0 = (uint32)((uint32)0U << 0U)  /* SCS[0] */
-                    | (uint32)((uint32)1U << 1U)  /* SCS[1] */
+                    | (uint32)((uint32)0U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)0U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)0U << 3U)  /* SCS[3] */
                     | (uint32)((uint32)0U << 4U)  /* SCS[4] */
-                    | (uint32)((uint32)1U << 5U)  /* SCS[5] */
+                    | (uint32)((uint32)0U << 5U)  /* SCS[5] */
                     | (uint32)((uint32)1U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO */
@@ -1468,7 +1468,7 @@
                     | (uint32)((uint32)1U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)1U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)1U << 3U)  /* SCS[3] */
-                    | (uint32)((uint32)0U << 8U)  /* ENA */
+                    | (uint32)((uint32)1U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO[0] */
                     | (uint32)((uint32)1U << 11U)  /* SOMI[0] */