Index: firmware/App/Services/AlarmMgmt.h =================================================================== diff -u -rb57b5341e4dfe3a7b17cd333bfcfac9036d11e85 -r0d46714bc22f87f7027c6e82ad59cef1a01ff69b --- firmware/App/Services/AlarmMgmt.h (.../AlarmMgmt.h) (revision b57b5341e4dfe3a7b17cd333bfcfac9036d11e85) +++ firmware/App/Services/AlarmMgmt.h (.../AlarmMgmt.h) (revision 0d46714bc22f87f7027c6e82ad59cef1a01ff69b) @@ -31,7 +31,8 @@ // ********** public definitions ********** -#include "AlarmDefs.h" +#include "AlarmDefs.h" +#include "AlarmMgmtSWFaults.h" #pragma pack(push,4) /// Record structure for unsigned integer alarm data. @@ -75,106 +76,6 @@ } ALARM_DATA_T; #pragma pack(pop) -// Listing of specific software faults for logging purposes. -typedef enum -{ - SW_FAULT_ID_NONE = 0, - SW_FAULT_ID_INT_ADC_DATA_OVERRUN, - SW_FAULT_ID_INT_ADC_INVALID_CHANNEL_REQUESTED, - SW_FAULT_ID_MODE_INIT_POST_INVALID_POST_STATE, - SW_FAULT_ID_OP_MODES_ILLEGAL_MODE_TRANSITION_REQUESTED, - SW_FAULT_ID_OP_MODES_INVALID_MODE_STATE, // 5 - SW_FAULT_ID_OP_MODES_INVALID_MODE_REQUESTED, - SW_FAULT_ID_OP_MODES_INVALID_MODE_TO_TRANSITION_TO, - SW_FAULT_ID_ALARM_MGMT_INVALID_ALARM_TO_ACTIVATE, - SW_FAULT_ID_ALARM_MGMT_INVALID_ALARM_TO_CLEAR, - SW_FAULT_ID_COMM_BUFFERS_ADD_TOO_MUCH_DATA, // 10 - SW_FAULT_ID_COMM_BUFFERS_ADD_INVALID_BUFFER, - SW_FAULT_ID_COMM_BUFFERS_GET_INVALID_BUFFER, - SW_FAULT_ID_COMM_BUFFERS_PEEK_INVALID_BUFFER, - SW_FAULT_ID_COMM_BUFFERS_COUNT_INVALID_BUFFER, - SW_FAULT_ID_FPGA_INVALID_IN_STATE, // 15 - SW_FAULT_ID_FPGA_INVALID_OUT_STATE, - SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, - SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA, - SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA, - SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA, // 20 - SW_FAULT_ID_MSG_QUEUES_ADD_QUEUE_FULL, - SW_FAULT_ID_MSG_QUEUES_ADD_INVALID_QUEUE, - SW_FAULT_ID_MSG_QUEUES_GET_INVALID_QUEUE, - SW_FAULT_ID_MSG_QUEUES_IS_EMPTY_INVALID_QUEUE, - SW_FAULT_ID_MSG_QUEUES_IS_FULL_INVALID_QUEUE, // 25 - SW_FAULT_ID_WATCHDOG_INVALID_SELF_TEST_STATE, - SW_FAULT_ID_RTC_EXEC_INVALID_STATE, - SW_FAULT_ID_RTC_SELF_TEST_INVALID_STATE, - SW_FAULT_ID_RTC_TRANSACTION_SERVICE_INVALID_STATE, - SW_FAULT_ID_MSG_PENDING_ACK_LIST_FULL, // 30 - SW_FAULT_ID_PI_CTRL_INVALID_CONTROLLER, - SW_FAULT_ID_PI_CTRL_INVALID_SIGNAL, - SW_FAULT_ID_NVDATAMGMT_EXEC_INVALID_STATE, - SW_FAULT_ID_NVDATAMGMT_INVALID_SELF_TEST_STATE, - SW_FAULT_ID_TEMPERATURE_SENSORS_INVALID_SELF_TEST_STATE, // 35 - SW_FAULT_ID_TEMPERATURE_SENSORS_EXEC_INVALID_STATE, - SW_FAULT_ID_HEATERS_SELF_TEST_INVALID_STATE, - SW_FAULT_ID_HEATERS_PRIMARY_HEATER_EXEC_INVALID_STATE, - SW_FAULT_ID_HEATERS_TRIMMER_HEATER_EXEC_INVALID_STATE, - SW_FAULT_ID_VALVES_INVALID_VALVE_STATE_NAME, // 40 - SW_FAULT_ID_VALVES_INVALID_VALVE_ID, - SW_FAULT_ID_CAN_PARITY_ERROR, - SW_FAULT_ID_CAN_PASSIVE_WARNING, - SW_FAULT_ID_CAN_OFF_ERROR, - SW_FAULT_ID_FPGA_UART_FRAME_ERROR, // 45 - SW_FAULT_ID_FPGA_UART_OVERRUN_ERROR, - SW_FAULT_ID_UTIL_TIME_WINDOWED_COUNT_ERROR, - SW_FAULT_ID_ACCEL_INVALID_STATE, - SW_FAULT_ID_ACCEL_GET_INVALID_AXIS, - SW_FAULT_ID_ACCEL_GET_MAX_INVALID_AXIS, // 50 - SW_FAULT_ID_ACCEL_INVALID_SELF_TEST_STATE, - SW_FAULT_ID_UTIL_INVALID_WIN_COUNT, - SW_FAULT_ID_UTIL_INVALID_WIN_MAX_COUNT, - SW_FAULT_ID_PERSISTENT_ALARM_INVALID_INDEX, - SW_FAULT_ID_CONCENTRATE_PUMP_EXEC_INVALID_STATE, // 55 - SW_FAULT_ID_CONCENTRATE_PUMP_INVALID_PUMP_ID, - SW_FAULT_ID_CONCENTRATE_PUMP_SPEED_OUT_OF_RANGE, - SW_FAULT_ID_UV_REACTORS_INVALID_EXEC_STATE, - SW_FAULT_ID_UV_REACTORS_INVALID_SELF_TEST_STATE, - SW_FAULT_ID_THERMISTORS_INVALID_EXEC_STATE, // 60 - SW_FAULT_ID_THERMISTORS_INVALID_SELF_TEST_STATE, - SW_FAULT_ID_INVALID_THERMISTOR_SELECTED, - SW_FAULT_ID_FAN_INVALID_EXEC_STATE, - SW_FAULT_ID_FAN_INVALID_SELF_TEST_STATE, - SW_FAULT_ID_INVALID_FAN_SELECTED, // 65 - SW_FAULT_ID_RO_PUMP_INVALID_EXEC_STATE, - SW_FAULT_ID_RO_PUMP_INVALID_FLOW_RATE_SET, - SW_FAULT_ID_DRAIN_PUMP_INVALID_EXEC_STATE, - SW_FAULT_ID_UV_REACTORS_INVALID_REACTOR_SELECTD, - SW_FAULT_ID_RO_PUMP_INVALID_PRESSURE_SELECTED, // 70 - SW_FAULT_ID_DRAIN_PUMP_INVALID_DELTA_PRESSURE_SELECTED, - SW_FAULT_ID_INVALID_TEMPERATURE_SENSOR_SELECTED, - SW_FAULT_ID_DRAIN_PUMP_INVALID_RPM_SELECTED, - SW_FAULT_ID_ALARM_MGMT_INVALID_ALARM_ID, - SW_FAULT_ID_DG_FLUSH_INVALID_EXEC_STATE, // 75 - SW_FAULT_ID_HEAT_DISINFECT_INVALID_EXEC_STATE, - SW_FAULT_ID_INVALID_DG_RESERVOIR_SELECTED, - SW_FAULT_ID_STANDBY_MODE_INVALID_EXEC_STATE, - SW_FAULT_ID_RECIRC_MODE_INVALID_EXEC_STATE, - SW_FAULT_ID_DRAIN_MODE_INVALID_EXEC_STATE, // 80 - SW_FAULT_ID_FILL_MODE_INVALID_EXEC_STATE, - SW_FAULT_ID_SOLO_MODE_INVALID_EXEC_STATE, - SW_FAULT_ID_PRESSURE_INVALID_EXEC_STATE, - SW_FAULT_ID_INVALID_NVDATAMGMT_EXEC_CAL_STATE, - SW_FAULT_ID_INVALID_VALVE_ID, // 85 - SW_FAULT_ID_INVALID_INT_ADC_CHANNEL_NUMBER, - SW_FAULT_ID_INVALID_RTI_NOTIFICATION, - SW_FAULT_ID_CAN_TX_FAULT, - SW_FAULT_ID_INVALID_CAN_MESSAGE_SIZE, - SW_FAULT_ID_INVALID_CONDUCTIVITY_SENSOR_ID, // 90 - SW_FAULT_ID_INVALID_PRESSURE_SENSOR_ID, - SW_FAULT_ID_INVALID_TASK, - SW_FAULT_ID_INVALID_CRC_ALGO, - NUM_OF_SW_FAULT_IDS -} SW_FAULT_ID_T; - // ********** public function prototypes ********** void initAlarmMgmt( void ); Index: firmware/App/Services/AlarmMgmtSWFaults.h =================================================================== diff -u --- firmware/App/Services/AlarmMgmtSWFaults.h (revision 0) +++ firmware/App/Services/AlarmMgmtSWFaults.h (revision 0d46714bc22f87f7027c6e82ad59cef1a01ff69b) @@ -0,0 +1,130 @@ +/************************************************************************** +* +* Copyright (c) 2019-2020 Diality Inc. - All Rights Reserved. +* +* THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN +* WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER. +* +* @file AlarmMgmt.h +* +* @author (last) Quang Nguyen +* @date (last) 24-Aug-2020 +* +* @author (original) Sean +* @date (original) 04-Feb-2020 +* +***************************************************************************/ + +#ifndef __ALARM_MGMT_SW_FAULTS_H__ +#define __ALARM_MGMT_SW_FAULTS_H__ + +/** + * @addtogroup AlarmManagement + * @{ + */ + +// ********** public definitions ********** + +// Listing of specific software faults for logging purposes. +typedef enum +{ + SW_FAULT_ID_NONE = 0, + SW_FAULT_ID_INT_ADC_DATA_OVERRUN, + SW_FAULT_ID_INT_ADC_INVALID_CHANNEL_REQUESTED, + SW_FAULT_ID_MODE_INIT_POST_INVALID_POST_STATE, + SW_FAULT_ID_OP_MODES_ILLEGAL_MODE_TRANSITION_REQUESTED, + SW_FAULT_ID_OP_MODES_INVALID_MODE_STATE, // 5 + SW_FAULT_ID_OP_MODES_INVALID_MODE_REQUESTED, + SW_FAULT_ID_OP_MODES_INVALID_MODE_TO_TRANSITION_TO, + SW_FAULT_ID_ALARM_MGMT_INVALID_ALARM_TO_ACTIVATE, + SW_FAULT_ID_ALARM_MGMT_INVALID_ALARM_TO_CLEAR, + SW_FAULT_ID_COMM_BUFFERS_ADD_TOO_MUCH_DATA, // 10 + SW_FAULT_ID_COMM_BUFFERS_ADD_INVALID_BUFFER, + SW_FAULT_ID_COMM_BUFFERS_GET_INVALID_BUFFER, + SW_FAULT_ID_COMM_BUFFERS_PEEK_INVALID_BUFFER, + SW_FAULT_ID_COMM_BUFFERS_COUNT_INVALID_BUFFER, + SW_FAULT_ID_FPGA_INVALID_IN_STATE, // 15 + SW_FAULT_ID_FPGA_INVALID_OUT_STATE, + SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, + SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA, + SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA, + SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA, // 20 + SW_FAULT_ID_MSG_QUEUES_ADD_QUEUE_FULL, + SW_FAULT_ID_MSG_QUEUES_ADD_INVALID_QUEUE, + SW_FAULT_ID_MSG_QUEUES_GET_INVALID_QUEUE, + SW_FAULT_ID_MSG_QUEUES_IS_EMPTY_INVALID_QUEUE, + SW_FAULT_ID_MSG_QUEUES_IS_FULL_INVALID_QUEUE, // 25 + SW_FAULT_ID_WATCHDOG_INVALID_SELF_TEST_STATE, + SW_FAULT_ID_RTC_EXEC_INVALID_STATE, + SW_FAULT_ID_RTC_SELF_TEST_INVALID_STATE, + SW_FAULT_ID_RTC_TRANSACTION_SERVICE_INVALID_STATE, + SW_FAULT_ID_MSG_PENDING_ACK_LIST_FULL, // 30 + SW_FAULT_ID_PI_CTRL_INVALID_CONTROLLER, + SW_FAULT_ID_PI_CTRL_INVALID_SIGNAL, + SW_FAULT_ID_NVDATAMGMT_EXEC_INVALID_STATE, + SW_FAULT_ID_NVDATAMGMT_INVALID_SELF_TEST_STATE, + SW_FAULT_ID_TEMPERATURE_SENSORS_INVALID_SELF_TEST_STATE, // 35 + SW_FAULT_ID_TEMPERATURE_SENSORS_EXEC_INVALID_STATE, + SW_FAULT_ID_HEATERS_SELF_TEST_INVALID_STATE, + SW_FAULT_ID_HEATERS_PRIMARY_HEATER_EXEC_INVALID_STATE, + SW_FAULT_ID_HEATERS_TRIMMER_HEATER_EXEC_INVALID_STATE, + SW_FAULT_ID_VALVES_INVALID_VALVE_STATE_NAME, // 40 + SW_FAULT_ID_VALVES_INVALID_VALVE_ID, + SW_FAULT_ID_CAN_PARITY_ERROR, + SW_FAULT_ID_CAN_PASSIVE_WARNING, + SW_FAULT_ID_CAN_OFF_ERROR, + SW_FAULT_ID_FPGA_UART_FRAME_ERROR, // 45 + SW_FAULT_ID_FPGA_UART_OVERRUN_ERROR, + SW_FAULT_ID_UTIL_TIME_WINDOWED_COUNT_ERROR, + SW_FAULT_ID_ACCEL_INVALID_STATE, + SW_FAULT_ID_ACCEL_GET_INVALID_AXIS, + SW_FAULT_ID_ACCEL_GET_MAX_INVALID_AXIS, // 50 + SW_FAULT_ID_ACCEL_INVALID_SELF_TEST_STATE, + SW_FAULT_ID_UTIL_INVALID_WIN_COUNT, + SW_FAULT_ID_UTIL_INVALID_WIN_MAX_COUNT, + SW_FAULT_ID_PERSISTENT_ALARM_INVALID_INDEX, + SW_FAULT_ID_CONCENTRATE_PUMP_EXEC_INVALID_STATE, // 55 + SW_FAULT_ID_CONCENTRATE_PUMP_INVALID_PUMP_ID, + SW_FAULT_ID_CONCENTRATE_PUMP_SPEED_OUT_OF_RANGE, + SW_FAULT_ID_UV_REACTORS_INVALID_EXEC_STATE, + SW_FAULT_ID_UV_REACTORS_INVALID_SELF_TEST_STATE, + SW_FAULT_ID_THERMISTORS_INVALID_EXEC_STATE, // 60 + SW_FAULT_ID_THERMISTORS_INVALID_SELF_TEST_STATE, + SW_FAULT_ID_INVALID_THERMISTOR_SELECTED, + SW_FAULT_ID_FAN_INVALID_EXEC_STATE, + SW_FAULT_ID_FAN_INVALID_SELF_TEST_STATE, + SW_FAULT_ID_INVALID_FAN_SELECTED, // 65 + SW_FAULT_ID_RO_PUMP_INVALID_EXEC_STATE, + SW_FAULT_ID_RO_PUMP_INVALID_FLOW_RATE_SET, + SW_FAULT_ID_DRAIN_PUMP_INVALID_EXEC_STATE, + SW_FAULT_ID_UV_REACTORS_INVALID_REACTOR_SELECTD, + SW_FAULT_ID_RO_PUMP_INVALID_PRESSURE_SELECTED, // 70 + SW_FAULT_ID_DRAIN_PUMP_INVALID_DELTA_PRESSURE_SELECTED, + SW_FAULT_ID_INVALID_TEMPERATURE_SENSOR_SELECTED, + SW_FAULT_ID_DRAIN_PUMP_INVALID_RPM_SELECTED, + SW_FAULT_ID_ALARM_MGMT_INVALID_ALARM_ID, + SW_FAULT_ID_DG_FLUSH_INVALID_EXEC_STATE, // 75 + SW_FAULT_ID_HEAT_DISINFECT_INVALID_EXEC_STATE, + SW_FAULT_ID_INVALID_DG_RESERVOIR_SELECTED, + SW_FAULT_ID_STANDBY_MODE_INVALID_EXEC_STATE, + SW_FAULT_ID_RECIRC_MODE_INVALID_EXEC_STATE, + SW_FAULT_ID_DRAIN_MODE_INVALID_EXEC_STATE, // 80 + SW_FAULT_ID_FILL_MODE_INVALID_EXEC_STATE, + SW_FAULT_ID_SOLO_MODE_INVALID_EXEC_STATE, + SW_FAULT_ID_PRESSURE_INVALID_EXEC_STATE, + SW_FAULT_ID_INVALID_NVDATAMGMT_EXEC_CAL_STATE, + SW_FAULT_ID_INVALID_VALVE_ID, // 85 + SW_FAULT_ID_INVALID_INT_ADC_CHANNEL_NUMBER, + SW_FAULT_ID_INVALID_RTI_NOTIFICATION, + SW_FAULT_ID_CAN_TX_FAULT, + SW_FAULT_ID_INVALID_CAN_MESSAGE_SIZE, + SW_FAULT_ID_INVALID_CONDUCTIVITY_SENSOR_ID, // 90 + SW_FAULT_ID_INVALID_PRESSURE_SENSOR_ID, + SW_FAULT_ID_INVALID_TASK, + SW_FAULT_ID_INVALID_CRC_ALGO, + NUM_OF_SW_FAULT_IDS +} SW_FAULT_ID_T; + +/**@}*/ + +#endif Index: firmware/App/Services/FPGA.c =================================================================== diff -u -r5adaa0ae1236d34fca1fc8def7fa107ec470115e -r0d46714bc22f87f7027c6e82ad59cef1a01ff69b --- firmware/App/Services/FPGA.c (.../FPGA.c) (revision 5adaa0ae1236d34fca1fc8def7fa107ec470115e) +++ firmware/App/Services/FPGA.c (.../FPGA.c) (revision 0d46714bc22f87f7027c6e82ad59cef1a01ff69b) @@ -46,7 +46,7 @@ } FPGA_STATE_T; #define FPGA_PAGE_SIZE 256 ///< FPGA page size. -#define FPGA_EXPECTED_ID 0x60 ///< FPGA expected ID. +#define FPGA_EXPECTED_ID 0x61 ///< FPGA expected ID. #define FPGA_HEADER_START_ADDR 0x0000 ///< FPGA header start address. #define FPGA_BULK_READ_START_ADDR 0x0100 ///< FPGA bulk read start address. @@ -176,7 +176,7 @@ U16 fpgaFanOut2Pulse; ///< Reg 398. Fan outlet 2 pulse time in 2.5 resolution U16 fpgaFanIn3Pulse; ///< Reg 400. Fan inlet 3 pulse time in 2.5 resolution U16 fpgaFanOut3Pulse; ///< Reg 402. Fan outlet 3 pulse time in 2.5 resolution - + U16 fpgaTimerCount; ///< Reg 404. Internal FPGA timer count. } DG_FPGA_SENSORS_T; typedef struct @@ -1788,6 +1788,18 @@ /*********************************************************************//** * @brief + * The getFPGATimerCount function gets the latest FPGA timer count. + * @details Inputs: fpgaSensorReadings + * @details Outputs: none + * @return last FPGA timer count + *************************************************************************/ +U16 getFPGATimerCount( void ) +{ + return fpgaSensorReadings.fpgaTimerCount; +} + +/*********************************************************************//** + * @brief * The noFluidLeakDetected function returns TRUE if no fluid leak has been * detected (dry) and FALSE if a fluid leak has been detected (wet). * @details Inputs: fpgaSensorReadings Index: firmware/App/Services/FPGA.h =================================================================== diff -u -r98eaa905f2487013d5e9af76bf064f872332c2fe -r0d46714bc22f87f7027c6e82ad59cef1a01ff69b --- firmware/App/Services/FPGA.h (.../FPGA.h) (revision 98eaa905f2487013d5e9af76bf064f872332c2fe) +++ firmware/App/Services/FPGA.h (.../FPGA.h) (revision 0d46714bc22f87f7027c6e82ad59cef1a01ff69b) @@ -132,6 +132,8 @@ U08 getFPGAADC2ReadCount( void ); U08 getFPGAADC2ErrorCount( void ); +U16 getFPGATimerCount( void ); + BOOL noFPGAFluidLeakDetected( void); /**@}*/ Index: firmware/App/Services/Integrity.c =================================================================== diff -u -r8a62c2738fd9a1751280e9c4d9fc0c925e5aad2d -r0d46714bc22f87f7027c6e82ad59cef1a01ff69b --- firmware/App/Services/Integrity.c (.../Integrity.c) (revision 8a62c2738fd9a1751280e9c4d9fc0c925e5aad2d) +++ firmware/App/Services/Integrity.c (.../Integrity.c) (revision 0d46714bc22f87f7027c6e82ad59cef1a01ff69b) @@ -27,12 +27,18 @@ // ********** private definitions ********** -#define CRC_TABLE_STARTING_ADDR 0x20 ///< The starting address of CRC table for firmware image. +#define CRC_TABLE_STARTING_ADDR 0x20 ///< The starting address of CRC table for firmware image. +#define MAX_CRC_CALC_DATA_SIZE 0x8000 ///< The maximum size of data for each CRC calculation. // ********** private data ********** -static BOOL checkCrc( CRC_RECORD const * const recPtr ); - +static U32 currentRecord; ///< Current CRC table record to check. +static U32 currentProcessedSize; ///< Current data size processed for CRC calculation. +static U32 crcCalculated; ///< The calculated CRC value. +static SELF_TEST_STATUS_T integrityTestStatus; ///< Current firmware integrity test status. + +static U32 calculateCrc( U32 const crcValue, U08 * dataPtr, U32 size, U32 crcAlgoId ); + /*********************************************************************//** * @brief * The initIntegrity function initializes the Integrity module. @@ -42,65 +48,88 @@ *************************************************************************/ void initIntegrity( void ) { + currentRecord = 0; + currentProcessedSize = 0; + crcCalculated = 0; + integrityTestStatus = SELF_TEST_STATUS_IN_PROGRESS; } /*********************************************************************//** * @brief * The execIntegrityTest function executes the integrity check for firmware image. * @details Inputs: firmware image CRC table * @details Outputs: none - * @return Firmware image integrity self-test status + * @return firmware image integrity self-test status *************************************************************************/ SELF_TEST_STATUS_T execIntegrityTest( void ) { CRC_TABLE const * const crcTablePtr = (CRC_TABLE *)CRC_TABLE_STARTING_ADDR; + CRC_RECORD const * const currentRecordPtr = &crcTablePtr->recs[ currentRecord ]; BOOL integrityStatus = TRUE; - SELF_TEST_STATUS_T result; - U32 i; + U32 remainingSize = 0; - for ( i = 0; i < crcTablePtr->num_recs; ++i ) + if ( currentRecord < crcTablePtr->num_recs ) { - integrityStatus &= checkCrc( &crcTablePtr->recs[i] ); + remainingSize = currentRecordPtr->size - currentProcessedSize; + + if ( remainingSize > MAX_CRC_CALC_DATA_SIZE ) + { + crcCalculated = calculateCrc( crcCalculated, (U08 *)( currentRecordPtr->addr + currentProcessedSize ), + MAX_CRC_CALC_DATA_SIZE, currentRecordPtr->crc_alg_ID ); + currentProcessedSize += MAX_CRC_CALC_DATA_SIZE; + } + else + { + crcCalculated = calculateCrc( crcCalculated, (U08 *)( currentRecordPtr->addr + currentProcessedSize ), + remainingSize, currentRecordPtr->crc_alg_ID ); + integrityStatus &= ( ( (U32)currentRecordPtr->crc_value == crcCalculated ) ? TRUE : FALSE ); + crcCalculated = 0; + currentProcessedSize = 0; + currentRecord++; + } } - if ( TRUE == integrityStatus ) + if ( TRUE != integrityStatus ) { - result = SELF_TEST_STATUS_PASSED; + integrityTestStatus = SELF_TEST_STATUS_FAILED; + activateAlarmNoData( ALARM_ID_HD_INTEGRITY_POST_TEST_FAILED ); } - else + else if ( currentRecord == crcTablePtr->num_recs ) { - result = SELF_TEST_STATUS_FAILED; - activateAlarmNoData( ALARM_ID_HD_INTEGRITY_POST_TEST_FAILED ); + integrityTestStatus = SELF_TEST_STATUS_PASSED; } - return result; -} + return integrityTestStatus; +} /*********************************************************************//** * @brief - * The checkCrc function computes the CRC on given memory section and CRC - * algorithm. Then it compares with calculated CRC created by linker. + * The calculateCrc function computes the CRC on the given memory section + * and CRC algorithm. * @details Inputs: none * @details Outputs: none - * @param recPtr CRC record data pointer - * @return TRUE if two CRCs are matched, otherwise FALSE + * @param crcValue crc initial value + * @param dataPtr pointer to data record for CRC calculation + * @param size data size to calculate crc + * @param crcAlgoId CRC algorithm id number + * @return calculated CRC value *************************************************************************/ -static BOOL checkCrc( CRC_RECORD const * const recPtr ) +static U32 calculateCrc( U32 const crcValue, U08 * dataPtr, U32 size, U32 crcAlgoId ) { - U32 crcCalculated = 0; + U32 crcCalc = 0; - switch ( recPtr->crc_alg_ID ) + switch ( crcAlgoId ) { case CRC32_C: - crcCalculated = crc32( (U08 *)recPtr->addr, recPtr->size ); + crcCalc = crc32( crcValue, dataPtr, size ); break; default: - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_INVALID_CRC_ALGO, recPtr->crc_alg_ID ) + SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_SOFTWARE_FAULT, SW_FAULT_ID_INVALID_CRC_ALGO, crcAlgoId ) break; } - return ( (U32)recPtr->crc_value == crcCalculated ) ? TRUE : FALSE; + return crcCalc; } /**@}*/