Index: firmware/App/Services/FPGA.c =================================================================== diff -u -rfc78b1e5af6d7ab8f7656b410c4cacdfd76a49e6 -r8f774b5281d17ba076885cd97d095165d0ce3f42 --- firmware/App/Services/FPGA.c (.../FPGA.c) (revision fc78b1e5af6d7ab8f7656b410c4cacdfd76a49e6) +++ firmware/App/Services/FPGA.c (.../FPGA.c) (revision 8f774b5281d17ba076885cd97d095165d0ce3f42) @@ -356,7 +356,6 @@ static FPGA_HEADER_T fpgaHeader; ///< FPGA header structure. static DG_FPGA_SENSORS_T fpgaSensorReadings; ///< DG FPGA sensors structure. static FPGA_ACTUATORS_T fpgaActuatorSetPoints; ///< FPGA actuator set points structure. -static U08 fpgaReadByteSize; ///< FPGA read byte size. // ********** private function prototypes ********** @@ -378,6 +377,7 @@ static void consumeUnexpectedData( void ); static BOOL checkFPGACommFailure( void ); +static BOOL checkFPGAFEOEFailure( void ); /*********************************************************************//** * @brief @@ -574,8 +574,10 @@ *************************************************************************/ void execFPGAIn( void ) { - fpgaReadByteSize = sizeof( DG_FPGA_SENSORS_T ); + // Check if FE or OE error has occurred + checkFPGAFEOEFailure(); + // FPGA incoming state machine switch ( fpgaState ) { @@ -621,7 +623,6 @@ *************************************************************************/ void execFPGAOut( void ) { - fpgaReadByteSize = sizeof( DG_FPGA_SENSORS_T ); // FPGA outgoing state machine switch ( fpgaState ) @@ -765,7 +766,7 @@ fpgaReadCmdBuffer[ 0 ] = FPGA_READ_CMD_CODE; fpgaReadCmdBuffer[ 1 ] = GET_LSB_OF_WORD( FPGA_BULK_READ_START_ADDR ); fpgaReadCmdBuffer[ 2 ] = GET_MSB_OF_WORD( FPGA_BULK_READ_START_ADDR ); - fpgaReadCmdBuffer[ 3 ] = fpgaReadByteSize; + fpgaReadCmdBuffer[ 3 ] = sizeof( DG_FPGA_SENSORS_T ); crc = crc16( fpgaReadCmdBuffer, FPGA_READ_CMD_HDR_LEN ); fpgaReadCmdBuffer[ 4 ] = GET_MSB_OF_WORD( crc ); fpgaReadCmdBuffer[ 5 ] = GET_LSB_OF_WORD( crc ); @@ -776,7 +777,7 @@ // prep DMA for sending the bulk read cmd and receiving its response setupDMAForReadCmd( FPGA_READ_CMD_HDR_LEN + FPGA_CRC_LEN ); - setupDMAForReadResp( FPGA_READ_RSP_HDR_LEN + fpgaReadByteSize + FPGA_CRC_LEN ); + setupDMAForReadResp( FPGA_READ_RSP_HDR_LEN + sizeof( DG_FPGA_SENSORS_T ) + FPGA_CRC_LEN ); // set fpga comm flags for bulk write cmd and follow-up bulk read command fpgaWriteCommandInProgress = TRUE; @@ -844,15 +845,15 @@ // did FPGA ACK the read command? if ( fpgaReadResponseBuffer[ 0 ] == FPGA_READ_CMD_ACK ) { - U32 rspSize = FPGA_READ_RSP_HDR_LEN + fpgaReadByteSize; + U32 rspSize = FPGA_READ_RSP_HDR_LEN + sizeof( DG_FPGA_SENSORS_T ); U32 crcPos = rspSize; U16 crc = MAKE_WORD_OF_BYTES( fpgaReadResponseBuffer[ crcPos ], fpgaReadResponseBuffer[ crcPos + 1 ] ); // does the FPGA response CRC check out? if ( crc == crc16( fpgaReadResponseBuffer, rspSize ) ) { // capture the read values - memcpy( &fpgaSensorReadings, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], fpgaReadByteSize ); + memcpy( &fpgaSensorReadings, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], sizeof( DG_FPGA_SENSORS_T ) ); result = FPGA_STATE_WRITE_ALL_ACTUATORS; } else // bad CRC @@ -2722,4 +2723,35 @@ return status; } + +/*********************************************************************//** + * @brief + * The checkFPGACommFailure function increments the FPGA comm failure + * windowed timer if an FE or OE error has occurred and returns whether + * or not the number of failures in + * the window have been reached. + * @details Inputs: none + * @details Outputs: none + * @return TRUE if windowed count exceeded, else false. + *************************************************************************/ +static BOOL checkFPGAFEOEFailure( void ) +{ + BOOL status = false; + BOOL FPGAFEOEError = getSci2FEOEError(); + + if ( TRUE == FPGAFEOEError) + { + if ( getMSTimerCount() > MIN_POWER_ON_TIME_FOR_COMM_FAILS ) + { + if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_COMM_FAILURES ) ) + { + SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_COMM_TIMEOUT, MAX_FPGA_COMM_FAILURES, (U32)fpgaSensorReadings.fpgaIOErrorCntProcessor ) + status = TRUE; + } + } + } + + return status; +} + /**@}*/ Index: firmware/App/Services/Interrupts.c =================================================================== diff -u -r6499ea25921fcf67826fa0c35bb03caf411ba542 -r8f774b5281d17ba076885cd97d095165d0ce3f42 --- firmware/App/Services/Interrupts.c (.../Interrupts.c) (revision 6499ea25921fcf67826fa0c35bb03caf411ba542) +++ firmware/App/Services/Interrupts.c (.../Interrupts.c) (revision 8f774b5281d17ba076885cd97d095165d0ce3f42) @@ -41,6 +41,8 @@ #define COMM_ERROR_TIME_WINDOW_MS (10 * SEC_PER_MIN * MS_PER_SECOND) ///< Time window for comm error counts. // ********** private data ********** + +static BOOL sci2FEOEError = FALSE; ///< FPGA serial frame or overrun flag; static U32 can1WarningCnt; ///< CAN1 warning count. static U32 can1BusOffCnt; ///< CAN1 bus offline count. @@ -62,8 +64,6 @@ // initialize various time windowed counts for monitoring CAN & UART errors and warnings initTimeWindowedCount( TIME_WINDOWED_COUNT_CAN_OFF, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS ); initTimeWindowedCount( TIME_WINDOWED_COUNT_CAN_PARITY, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS ); - initTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_UART_FRAME_ERROR, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS ); - initTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_UART_OVERRUN, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS ); } /*********************************************************************//** @@ -174,8 +174,36 @@ // Ignore - other notifications - unhandled } } -} +} +/*********************************************************************//** + * @brief + * The sciNotification function handles UART communication error interrupts. + * Frame and Over-run errors are handled. + * @details Inputs: none + * @details Outputs: UART error interrupts handled. + * @param sci Pointer to the SCI peripheral that detected the error + * @param flags error flag(s) + * @return none + *************************************************************************/ +void sciNotification(sciBASE_t *sci, uint32 flags) +{ + if ( sci == scilinREG ) + { + if ( ( flags & SCI_FE_INT ) != 0 ) + { + sci2FEOEError = TRUE; + scilinREG->FLR |= SCI_FE_INT; + } + + if ( ( flags & SCI_OE_INT ) != 0 ) + { + sci2FEOEError = TRUE; + scilinREG->FLR |= SCI_OE_INT; + } + } +} + /*********************************************************************//** * @brief * The dmaGroupANotification function handles communication DMA interrupts. @@ -206,6 +234,26 @@ break; } } -} +} + +/*********************************************************************//** + * @brief + * The getSci2FEOEError function returns the sci2FEOEError (OE - Overrun, + * FE - Framing Error) status and resets the status if TRUE + * @details Inputs: sci2FEOEError + * @details Outputs: none + * @return sci2 FE / OE error + *************************************************************************/ +BOOL getSci2FEOEError( void ) +{ + BOOL returnValue = sci2FEOEError; + if ( TRUE == returnValue ) + { + sci2FEOEError = FALSE; + } + + return returnValue;; +} + /**@}*/ Index: firmware/App/Services/Interrupts.h =================================================================== diff -u -r6499ea25921fcf67826fa0c35bb03caf411ba542 -r8f774b5281d17ba076885cd97d095165d0ce3f42 --- firmware/App/Services/Interrupts.h (.../Interrupts.h) (revision 6499ea25921fcf67826fa0c35bb03caf411ba542) +++ firmware/App/Services/Interrupts.h (.../Interrupts.h) (revision 8f774b5281d17ba076885cd97d095165d0ce3f42) @@ -34,6 +34,8 @@ void initInterrupts( void ); +BOOL getSci2FEOEError( void ); + /**@}*/ #endif