Index: Integrity.c =================================================================== diff -u -r2c508d911fedf7fea1a081f449070aeed248b85c -r492acf8b47f113e426b68c23a3438e428b9fe735 --- Integrity.c (.../Integrity.c) (revision 2c508d911fedf7fea1a081f449070aeed248b85c) +++ Integrity.c (.../Integrity.c) (revision 492acf8b47f113e426b68c23a3438e428b9fe735) @@ -26,28 +26,32 @@ #include "Utilities.h" #include "DGDefs.h" #include "HDDefs.h" - + /** * @addtogroup Integrity * @{ */ -// ********** private definitions ********** +// ********** private definitions ********** +#ifdef WITH_BOOTLOADER +#define CRC_TABLE_STARTING_ADDR 0x10040 ///< The starting address of CRC table for firmware image. +#else #define CRC_TABLE_STARTING_ADDR 0x20 ///< The starting address of CRC table for firmware image. +#endif // WITH_BOOTLOADER #define MAX_CRC_CALC_DATA_SIZE 0x8000 ///< The maximum size of data for each CRC calculation. #define SERR 0x00000001 ///< Bit 0 - Single-bit error in TCRAM Module Error Status Register #define ADDR_DEC_FAIL 0x00000004 ///< Bit 2 - Address decode failed in TCRAM Module Error Status Register #define ADDR_COMP_LOGIC_FAIL 0x00000010 ///< Bit 4 - Address decode logic element failed in TCRAM Module Error Status Register #define DERR 0x00000020 ///< Bit 5 - Multiple bit error in TCRAM Module Error Status Register #define RADDR_PAR_FAIL 0x00000100 ///< Bit 8 - Read Address Parity Failure in TCRAM Module Error Status Register #define WADDR_PAR_FAIL 0x00000200 ///< Bit 9 - Write Address Parity Failure in TCRAM Module Error Status Register - + /// Time threshold to check RAM error is 2 seconds static const U32 RAM_ERROR_CHECK_TIME_THRESHOLD = ((2 * MS_PER_SECOND) / TASK_GENERAL_INTERVAL); // ********** private data ********** - + static U32 currentRecord; ///< Current CRC table record to check. static U32 currentProcessedSize; ///< Current data size processed for CRC calculation. static U32 crcCalculated; ///< The calculated CRC value. @@ -173,5 +177,5 @@ return integrityTestStatus; } - -/**@}*/ + +/**@}*/