Index: Integrity.c
===================================================================
diff -u -ra97a486723557b2b8728b7b8ee3d12f1c3cd52ba -r59871c9964559b5137781af9c2eeed6bab18ef73
--- Integrity.c	(.../Integrity.c)	(revision a97a486723557b2b8728b7b8ee3d12f1c3cd52ba)
+++ Integrity.c	(.../Integrity.c)	(revision 59871c9964559b5137781af9c2eeed6bab18ef73)
@@ -1,21 +1,24 @@
 /**************************************************************************
 *
-* Copyright (c) 2021-2023 Diality Inc. - All Rights Reserved.
+* Copyright (c) 2021-2024 Diality Inc. - All Rights Reserved.
 *
 * THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
 * WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
 *
 * @file    Integrity.c
 *
-* @author  (last)      Michael Garthwaite
-* @date    (last)      15-Aug-2023
+* @author  (last)      Dara Navaei
+* @date    (last)      29-Sep-2023
 *
 * @author  (original)  Quang Nguyen
 * @date    (original)  29-May-2021
 *
 ***************************************************************************/
 
+#ifndef _VECTORCAST_
+// This header file is disabled in VectorCAST because this is a TI library and VectorCAST uses GNU 7.4 compiler for testing
 #include <crc_tbl.h>
+#endif
 
 #include "reg_tcram.h"
 
@@ -34,15 +37,55 @@
 
 // ********** private definitions **********
 
+#ifndef _VECTORCAST_
+// This address is redefined in VectorCAST again
 #define CRC_TABLE_STARTING_ADDR             0x20                ///< The starting address of CRC table for firmware image.
+#endif
 #define MAX_CRC_CALC_DATA_SIZE              0x8000              ///< The maximum size of data for each CRC calculation.
 #define SERR                                0x00000001          ///< Bit 0 - Single-bit error in TCRAM Module Error Status Register
 #define ADDR_DEC_FAIL                       0x00000004          ///< Bit 2 - Address decode failed in TCRAM Module Error Status Register
 #define ADDR_COMP_LOGIC_FAIL                0x00000010          ///< Bit 4 - Address decode logic element failed in TCRAM Module Error Status Register
 #define DERR                                0x00000020          ///< Bit 5 - Multiple bit error in TCRAM Module Error Status Register
 #define RADDR_PAR_FAIL                      0x00000100          ///< Bit 8 - Read Address Parity Failure in TCRAM Module Error Status Register
 #define WADDR_PAR_FAIL                      0x00000200          ///< Bit 9 - Write Address Parity Failure in TCRAM Module Error Status Register
-
+
+
+#ifdef _VECTORCAST_
+// Since VectorCAST does not have access to #include <crc_tbl.h>, the structures are defined here so VectoCAST can compile and
+// instrument the code for Dev testing
+/*********************************************************/
+/* CRC Record Data Structure                             */
+/* NOTE: The list of fields and the size of each field   */
+/*       varies by target and memory model.              */
+/*********************************************************/
+typedef struct crc_record
+{
+uint64_t         crc_value;
+uint32_t         crc_alg_ID;    /* CRC algorithm ID */
+uint32_t         addr;          /* Starting address      */
+uint32_t         size;          /* size of data in bytes */
+uint32_t         padding;       /* explicit padding so layout is the same */
+                                /* for COFF and ELF                       */
+} CRC_RECORD;
+
+/*********************************************************/
+/* CRC Table Data Structure                              */
+/*********************************************************/
+typedef struct crc_table
+{
+uint32_t         rec_size;
+uint32_t         num_recs;
+CRC_RECORD       recs[1];
+} CRC_TABLE;
+
+// Defined a CRC table here since the start address of the CRC table in the firmware will cause a segmentation fault in VectorCAST
+// The CRC_TABLE_STARTING_ADDR in undefined at the top and is defined here again with pointing to the testTable address that has
+// been define here.
+// NOTE: User prefix code was not used because defining the structures at the top would cause compilation errors
+CRC_TABLE testTable;
+#define CRC_TABLE_STARTING_ADDR &testTable
+#endif
+
 /// Time threshold to check RAM error is 2 seconds
 static const U32 RAM_ERROR_CHECK_TIME_THRESHOLD = ((2 * MS_PER_SECOND) / TASK_GENERAL_INTERVAL);
 
@@ -116,8 +159,8 @@
             }
         }
 
-        err1 = getU32OverrideValue( &tcram1ErrStat ) & ( SERR | ADDR_DEC_FAIL | ADDR_COMP_LOGIC_FAIL | DERR | RADDR_PAR_FAIL | WADDR_PAR_FAIL);
-        err2 = getU32OverrideValue( &tcram2ErrStat ) & ( SERR | ADDR_DEC_FAIL | ADDR_COMP_LOGIC_FAIL | DERR | RADDR_PAR_FAIL | WADDR_PAR_FAIL);
+        err1 = getU32OverrideValue( &tcram1ErrStat ) & ( SERR | ADDR_DEC_FAIL | ADDR_COMP_LOGIC_FAIL | DERR | RADDR_PAR_FAIL | WADDR_PAR_FAIL );
+        err2 = getU32OverrideValue( &tcram2ErrStat ) & ( SERR | ADDR_DEC_FAIL | ADDR_COMP_LOGIC_FAIL | DERR | RADDR_PAR_FAIL | WADDR_PAR_FAIL );
 
         if ( ( err1 != 0 ) || ( err2 != 0 ) )
         {