Index: RTC.c =================================================================== diff -u -r9994d19d718b4a64426a4dd93b5a33fa55e5e2c4 -rb6711400cf9f7239d7f9041da7c87d89d901b02a --- RTC.c (.../RTC.c) (revision 9994d19d718b4a64426a4dd93b5a33fa55e5e2c4) +++ RTC.c (.../RTC.c) (revision b6711400cf9f7239d7f9041da7c87d89d901b02a) @@ -8,7 +8,7 @@ * @file RTC.c * * @author (last) Dara Navaei -* @date (last) 24-May-2022 +* @date (last) 13-Jul-2022 * * @author (original) Dara Navaei * @date (original) 11-Jan-2020 @@ -178,37 +178,35 @@ // ********** private data ********** -static RTC_SELF_TEST_STATE_T RTCSelfTestState = RTC_SELF_TEST_STATE_START; ///< Self test variable. -static RTC_GET_DATA_STATE_T RTCServiceState = RTC_SEND_COMMAND; ///< RTC get data variable. -static RTC_EXEC_STATE_T RTCExecState = RTC_EXEC_STATE_WAIT_FOR_POST; ///< RTC exec state variable. -static SELF_TEST_STATUS_T RTCSelfTestResult = SELF_TEST_STATUS_IN_PROGRESS; ///< RTC self-test status variable. -static RTC_RAM_STATUS_T RTCRAMStatus = RTC_RAM_STATUS_IDLE; ///< RTC RAM status variable. -static RTC_RAM_STATE_T RTCRAMState = RTC_RAM_STATE_READY; ///< RTC RAM state. -static RTC_TIMESTAMP_T RTCTimestampStruct; ///< Timestamp record - last read from RTC. -static RTC_TIMESTAMP_T RTCNewTimestampStruct; ///< New timestamp record that will hold the new time to be written to RTC. - -static U32 RTCSelfTestTimer = 0; ///< Self test timer. -static U32 RTCPreviousSecond = 0; ///< Previous second for self-test comparison. -static U32 RAMBufferLength = 0; ///< RAM buffer length for RAM operations. -static U32 lastEpochTime = 0; ///< Last epoch time. -static U32 previousTransferLength = 0; ///< Previous transfer length. - -static U32 timeCounter = 1; ///< Initial time counter (1). -static U32 numberOfFailedRTCTransfers = 1; ///< Initial number of failed RTC transactions (1). - -static BOOL hasWriteToRTCRequested = FALSE; ///< Flag to request RTC write. -static BOOL hasWriteToRAMRequested = FALSE; ///< Flag to write to RTC RAM. -static BOOL hasReadFromRAMRequested = FALSE; ///< Flag to read from RTC RAM. -static BOOL isRTCServiceOnEntry = FALSE; ///< Flag to check if service is on entry. -static BOOL isTimestampBufferReady = FALSE; ///< Flag to check if the timestamp buffer is ready. - +static RTC_SELF_TEST_STATE_T RTCSelfTestState; ///< Self test variable. +static RTC_GET_DATA_STATE_T RTCServiceState; ///< RTC get data variable. +static RTC_EXEC_STATE_T RTCExecState; ///< RTC exec state variable. +static SELF_TEST_STATUS_T RTCSelfTestResult; ///< RTC self-test status variable. +static RTC_RAM_STATUS_T RTCRAMStatus; ///< RTC RAM status variable. +static RTC_RAM_STATE_T RTCRAMState; ///< RTC RAM state. +static RTC_TIMESTAMP_T RTCTimestampStruct; ///< Timestamp record - last read from RTC. +static RTC_TIMESTAMP_T RTCNewTimestampStruct; ///< New timestamp record that will hold the new time to be written to RTC. +static U32 RTCSelfTestTimer; ///< Self test timer. +static U32 RTCPreviousSecond; ///< Previous second for self-test comparison. +static U32 RAMBufferLength; ///< RAM buffer length for RAM operations. +static U32 lastEpochTime; ///< Last epoch time. +static U32 previousTransferLength; ///< Previous transfer length. +static U32 timeCounter; ///< Initial time counter (1). +static U32 numberOfFailedRTCTransfers; ///< Initial number of failed RTC transactions (1). +static BOOL hasWriteToRTCRequested; ///< Flag to request RTC write. +static BOOL hasWriteToRAMRequested; ///< Flag to write to RTC RAM. +static BOOL hasReadFromRAMRequested; ///< Flag to read from RTC RAM. +static BOOL isRTCServiceOnEntry; ///< Flag to check if service is on entry. +static BOOL isTimestampBufferReady; ///< Flag to check if the timestamp buffer is ready. static U16 rxBuffer[ MIBSPI_MAX_BUFFER_LENGTH + 1 ]; ///< Buffer to receive data from RTC. static U16 txBuffer[ MIBSPI_MAX_BUFFER_LENGTH + 1 ]; ///< Buffer to transmit data to RTC. - static U16 prepRAMBuffer[ RTC_RAM_PREP_BUFFER_LENGTH ]; ///< Buffer to send prep read/write commands to RTC RAM. static U16 RAMBuffer[ MIBSPI_MAX_BUFFER_LENGTH ]; ///< Buffer to read RTC RAM data. +static U16 previousFPGATimerCount; ///< Previous FPGA timer count; +#ifdef _DG_ +static BOOL syncDG2HDDateTimeFlag = FALSE; ///< Flag indicating whether DG RTC should be sync'd to HD RTC. +#endif -static U16 previousFPGATimerCount = 0; ///< Previous FPGA timer count; /// Array of days in each month. Assumes non-leap year. Must adjust days in February if leap year. static U32 daysInMonth[ 12 ] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; @@ -229,7 +227,6 @@ static RTC_SELF_TEST_STATE_T handleSelfTestWaitForFirstSecond( void ); static RTC_SELF_TEST_STATE_T handleSelfTestCheckAccuracy( void ); -static RTC_EXEC_STATE_T handleExecWaitForPostState( void ); static RTC_EXEC_STATE_T handleExecIdleState( void ); static RTC_EXEC_STATE_T handleExecReadState( void ); static RTC_EXEC_STATE_T handleExecPrepRAMState( void ); @@ -246,8 +243,25 @@ *************************************************************************/ void initRTC( void ) { - RTCSelfTestState = RTC_SELF_TEST_STATE_START; - RTCServiceState = RTC_SEND_COMMAND; + RTCSelfTestState = RTC_SELF_TEST_STATE_START; + RTCServiceState = RTC_SEND_COMMAND; + RTCExecState = RTC_EXEC_STATE_IDLE; + RTCSelfTestResult = SELF_TEST_STATUS_IN_PROGRESS; + RTCRAMStatus = RTC_RAM_STATUS_IDLE; + RTCRAMState = RTC_RAM_STATE_READY; + RTCSelfTestTimer = 0; + RTCPreviousSecond = 0; + RAMBufferLength = 0; + lastEpochTime = 0; + previousTransferLength = 0; + timeCounter = 1; + numberOfFailedRTCTransfers = 1; + hasWriteToRTCRequested = FALSE; + hasWriteToRAMRequested = FALSE; + hasReadFromRAMRequested = FALSE; + isRTCServiceOnEntry = FALSE; + isTimestampBufferReady = FALSE; + previousFPGATimerCount = 0; } /*********************************************************************//** @@ -388,10 +402,6 @@ { switch ( RTCExecState ) { - case RTC_EXEC_STATE_WAIT_FOR_POST: - RTCExecState = handleExecWaitForPostState(); - break; - case RTC_EXEC_STATE_IDLE: RTCExecState = handleExecIdleState(); break; @@ -440,8 +450,40 @@ return lastEpochTime; } +#ifdef _DG_ /*********************************************************************//** * @brief + * The signalSyncToHD signals this module to sync RTC with date/time from + * HD RTC. + * @details Inputs: none + * @details Outputs: syncDG2HDDateTimeFlag + * @return lastEpochTime the time in epoch as a U32 + *************************************************************************/ +void signalSyncToHD( void ) +{ + syncDG2HDDateTimeFlag = TRUE; +} + +/*********************************************************************//** + * @brief + * The syncDG2HDDateTime determines whether it is time to sync date/time + * with HD RTC. + * @details Inputs: syncDG2HDDateTimeFlag + * @details Outputs: syncDG2HDDateTimeFlag + * @return TRUE if time to sync DG to HD date time, FALSE if not + *************************************************************************/ +BOOL syncDG2HDDateTime( void ) +{ + BOOL result = syncDG2HDDateTimeFlag; + + syncDG2HDDateTimeFlag = FALSE; + + return result; +} +#endif + +/*********************************************************************//** + * @brief * The writeToRAM checks whether the RAM status is idle and if it is, it * will check input address and length to make sure they are within the * range. If everything is fine, it will prepare the txBuffer and set the @@ -1033,28 +1075,6 @@ /*********************************************************************//** * @brief - * The handleExecWaitForPostState checks whether POST has completed and what - * was the result of the POST test. It will either go to Idle of Fault. - * @details Inputs: RTCSelfTestState - * @details Outputs: none - * @return next state - *************************************************************************/ -static RTC_EXEC_STATE_T handleExecWaitForPostState( void ) -{ - RTC_EXEC_STATE_T result = RTC_EXEC_STATE_WAIT_FOR_POST; - - if ( RTCSelfTestState == RTC_SELF_TEST_STATE_COMPLETE ) - { - // After POST is finished, first read the current time so there is one time stamp - // available in the memory - result = RTC_EXEC_STATE_READ; - } - - return result; -} - -/*********************************************************************//** - * @brief * The handleExecIdleState checks whether read or write to RTC or RAM has * been requested. If none of them have been requested, it will increment the * timer. @@ -1079,10 +1099,13 @@ { result = RTC_EXEC_STATE_PREP_RAM; } - else if ( TIMER_COUNTER_TO_REQUEST_READ == timeCounter ) + else if ( ( TIMER_COUNTER_TO_REQUEST_READ <= timeCounter ) && ( getCurrentOperationMode() != DG_MODE_INIT ) ) { - prepBufferForReadCommand( RTC_GENERAL_BUFFER_LENGTH ); - result = RTC_EXEC_STATE_READ; + if ( TRUE == getSemaphore( SEMAPHORE_RTC ) ) + { + prepBufferForReadCommand( RTC_GENERAL_BUFFER_LENGTH ); + result = RTC_EXEC_STATE_READ; + } } else { @@ -1120,17 +1143,21 @@ } RTC_EXEC_STATE_T result = RTC_EXEC_STATE_WRITE; - BOOL isStatusOk = serviceRTC( txBuffer, rxBuffer, RTC_GENERAL_BUFFER_LENGTH ); + BOOL isStatusOk = serviceRTC( txBuffer, rxBuffer, RTC_GENERAL_BUFFER_LENGTH ); if ( RTCServiceState == RTC_SERVICE_COMPLETE && isStatusOk ) { + releaseSemaphore( SEMAPHORE_RTC ); + // Reset the counter to start with the new read timeCounter = 1; hasWriteToRTCRequested = FALSE; result = RTC_EXEC_STATE_IDLE; } else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) { + releaseSemaphore( SEMAPHORE_RTC ); + SET_ALARM_WITH_1_U32_DATA( ALARM_ID_RTC_RAM_OPS_ERROR, result ); result = RTC_EXEC_STATE_IDLE; hasWriteToRTCRequested = FALSE; @@ -1150,7 +1177,7 @@ static RTC_EXEC_STATE_T handleExecPrepRAMState( void ) { RTC_EXEC_STATE_T result = RTC_EXEC_STATE_PREP_RAM; - BOOL isStatusOk = serviceRTC( prepRAMBuffer, RAMBuffer, RTC_RAM_PREP_BUFFER_LENGTH ); + BOOL isStatusOk = serviceRTC( prepRAMBuffer, RAMBuffer, RTC_RAM_PREP_BUFFER_LENGTH ); if ( RTCServiceState == RTC_SERVICE_COMPLETE && isStatusOk ) { @@ -1165,6 +1192,8 @@ } else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) { + releaseSemaphore( SEMAPHORE_RTC ); + SET_ALARM_WITH_1_U32_DATA( ALARM_ID_RTC_RAM_OPS_ERROR, result ); result = RTC_EXEC_STATE_IDLE; } @@ -1188,12 +1217,16 @@ if ( RTCServiceState == RTC_SERVICE_COMPLETE && isStatusOk ) { + releaseSemaphore( SEMAPHORE_RTC ); + result = RTC_EXEC_STATE_IDLE; RTCRAMStatus = RTC_RAM_STATUS_COMPLETE; hasWriteToRAMRequested = FALSE; } else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) { + releaseSemaphore( SEMAPHORE_RTC ); + RTCRAMStatus = RTC_RAM_STATUS_FAILED; SET_ALARM_WITH_2_U32_DATA( ALARM_ID_RTC_RAM_OPS_ERROR, result, RTCRAMStatus ); result = RTC_EXEC_STATE_IDLE; @@ -1215,16 +1248,20 @@ static RTC_EXEC_STATE_T handleExecReadFromRAMState( void ) { RTC_EXEC_STATE_T result = RTC_EXEC_STATE_READ_FROM_RAM; - BOOL isStatusOk = serviceRTC( txBuffer, RAMBuffer, RAMBufferLength + 1 ); + BOOL isStatusOk = serviceRTC( txBuffer, RAMBuffer, RAMBufferLength + 1 ); if ( RTCServiceState == RTC_SERVICE_COMPLETE && isStatusOk ) { + releaseSemaphore( SEMAPHORE_RTC ); + result = RTC_EXEC_STATE_IDLE; RTCRAMStatus = RTC_RAM_STATUS_COMPLETE; hasReadFromRAMRequested = FALSE; } else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) { + releaseSemaphore( SEMAPHORE_RTC ); + RTCRAMStatus = RTC_RAM_STATUS_FAILED; SET_ALARM_WITH_2_U32_DATA( ALARM_ID_RTC_RAM_OPS_ERROR, result, RTCRAMStatus ); result = RTC_EXEC_STATE_IDLE; @@ -1269,10 +1306,14 @@ #endif } + releaseSemaphore( SEMAPHORE_RTC ); + result = RTC_EXEC_STATE_IDLE; } else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) { + releaseSemaphore( SEMAPHORE_RTC ); + SET_ALARM_WITH_1_U32_DATA( ALARM_ID_RTC_RAM_OPS_ERROR, result ); result = RTC_EXEC_STATE_IDLE; } @@ -1293,9 +1334,12 @@ RTC_SELF_TEST_STATE_T result = RTC_SELF_TEST_STATE_START; RTCSelfTestResult = SELF_TEST_STATUS_IN_PROGRESS; - prepBufferForReadCommand( RTC_GENERAL_BUFFER_LENGTH ); + if ( TRUE == getSemaphore( SEMAPHORE_RTC ) ) + { + prepBufferForReadCommand( RTC_GENERAL_BUFFER_LENGTH ); - result = RTC_SELF_TEST_STATE_CHECK_CTRL_REGS; + result = RTC_SELF_TEST_STATE_CHECK_CTRL_REGS; + } return result; } @@ -1314,26 +1358,30 @@ static RTC_SELF_TEST_STATE_T handleSelfTestCheckCtrlRegs( void ) { RTC_SELF_TEST_STATE_T result = RTC_SELF_TEST_STATE_CHECK_CTRL_REGS; - BOOL isStatusOk = serviceRTC( txBuffer, rxBuffer, RTC_GENERAL_BUFFER_LENGTH ); + BOOL isStatusOk = serviceRTC( txBuffer, rxBuffer, RTC_GENERAL_BUFFER_LENGTH ); if ( ( RTC_SERVICE_COMPLETE == RTCServiceState ) && ( TRUE == isStatusOk ) ) { if ( TRUE == isRTCFunctional() ) { U32 RTCCurrentSecond = rxBuffer[ RTC_SECONDS_INDEX ]; - RTCPreviousSecond = RTCCurrentSecond; - result = RTC_SELF_TEST_STATE_WAIT_FOR_FIRST_SECOND; + RTCPreviousSecond = RTCCurrentSecond; + result = RTC_SELF_TEST_STATE_WAIT_FOR_FIRST_SECOND; } else { + releaseSemaphore( SEMAPHORE_RTC ); + RTCSelfTestResult = SELF_TEST_STATUS_FAILED; - result = RTC_SELF_TEST_STATE_COMPLETE; + result = RTC_SELF_TEST_STATE_COMPLETE; } } - else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) + else if ( RTC_SERVICE_COMPLETE == RTCServiceState ) { + releaseSemaphore( SEMAPHORE_RTC ); + RTCSelfTestResult = SELF_TEST_STATUS_FAILED; - result = RTC_SELF_TEST_STATE_COMPLETE; + result = RTC_SELF_TEST_STATE_COMPLETE; } return result; @@ -1370,12 +1418,16 @@ } else { + releaseSemaphore( SEMAPHORE_RTC ); + RTCSelfTestResult = SELF_TEST_STATUS_FAILED; result = RTC_SELF_TEST_STATE_COMPLETE; } } - else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) + else if ( RTC_SERVICE_COMPLETE == RTCServiceState ) { + releaseSemaphore( SEMAPHORE_RTC ); + RTCSelfTestResult = SELF_TEST_STATUS_FAILED; result = RTC_SELF_TEST_STATE_COMPLETE; } @@ -1428,6 +1480,8 @@ RTCSelfTestResult = SELF_TEST_STATUS_FAILED; SET_ALARM_WITH_2_U32_DATA( alarm, (U32)elapsedFPGATime, (U32)elapsedTime ); } + + releaseSemaphore( SEMAPHORE_RTC ); } #else result = RTC_SELF_TEST_STATE_COMPLETE; @@ -1437,19 +1491,7 @@ return result; } -/*********************************************************************//** - * @brief - * The resetRTCPostState function resets the RTC self test state - * @details Inputs: none - * @details Outputs : RTCSelfTestState - * @return none - *************************************************************************/ -void resetRTCPostState( void ) -{ - RTCSelfTestState = RTC_SELF_TEST_STATE_START; -} - /************************************************************************* * TEST SUPPORT FUNCTIONS *************************************************************************/