Index: RTC.c
===================================================================
diff -u -ra26f096ba8f55604062fa36bfacc3f3e7f4acecd -rb6711400cf9f7239d7f9041da7c87d89d901b02a
--- RTC.c	(.../RTC.c)	(revision a26f096ba8f55604062fa36bfacc3f3e7f4acecd)
+++ RTC.c	(.../RTC.c)	(revision b6711400cf9f7239d7f9041da7c87d89d901b02a)
@@ -203,6 +203,10 @@
 static U16 prepRAMBuffer[ RTC_RAM_PREP_BUFFER_LENGTH ];                         ///< Buffer to send prep read/write commands to RTC RAM.
 static U16 RAMBuffer[ MIBSPI_MAX_BUFFER_LENGTH ];                               ///< Buffer to read RTC RAM data.
 static U16 previousFPGATimerCount;                                              ///< Previous FPGA timer count;
+#ifdef _DG_
+static BOOL syncDG2HDDateTimeFlag = FALSE;                                      ///< Flag indicating whether DG RTC should be sync'd to HD RTC.
+#endif
+
 /// Array of days in each month.  Assumes non-leap year.  Must adjust days in February if leap year.
 static U32 daysInMonth[ 12 ] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
 
@@ -446,8 +450,40 @@
     return lastEpochTime;
 }
 
+#ifdef _DG_
 /*********************************************************************//**
  * @brief
+ * The signalSyncToHD signals this module to sync RTC with date/time from
+ * HD RTC.
+ * @details Inputs: none
+ * @details Outputs: syncDG2HDDateTimeFlag
+ * @return lastEpochTime the time in epoch as a U32
+ *************************************************************************/
+void signalSyncToHD( void )
+{
+    syncDG2HDDateTimeFlag = TRUE;
+}
+
+/*********************************************************************//**
+ * @brief
+ * The syncDG2HDDateTime determines whether it is time to sync date/time
+ * with HD RTC.
+ * @details Inputs: syncDG2HDDateTimeFlag
+ * @details Outputs: syncDG2HDDateTimeFlag
+ * @return TRUE if time to sync DG to HD date time, FALSE if not
+ *************************************************************************/
+BOOL syncDG2HDDateTime( void )
+{
+    BOOL result = syncDG2HDDateTimeFlag;
+
+    syncDG2HDDateTimeFlag = FALSE;
+
+    return result;
+}
+#endif
+
+/*********************************************************************//**
+ * @brief
  * The writeToRAM checks whether the RAM status is idle and if it is, it
  * will check input address and length to make sure they are within the
  * range. If everything is fine, it will prepare the txBuffer and set the
Index: RTC.h
===================================================================
diff -u -rfd1a4ea5198033bcbd17986c3079967afb1f220f -rb6711400cf9f7239d7f9041da7c87d89d901b02a
--- RTC.h	(.../RTC.h)	(revision fd1a4ea5198033bcbd17986c3079967afb1f220f)
+++ RTC.h	(.../RTC.h)	(revision b6711400cf9f7239d7f9041da7c87d89d901b02a)
@@ -69,6 +69,11 @@
 
 U32  getRTCTimestamp( void );
 
+#ifdef _DG_
+void signalSyncToHD( void );
+BOOL syncDG2HDDateTime( void );
+#endif
+
 SELF_TEST_STATUS_T execRTCSelfTest( void );
 
 RTC_RAM_STATUS_T writeToRAM( U32 address, U08* data, U32 length );