Index: App/Drivers/CPLD.c
===================================================================
diff -u -rc91e9da338d92432930d3589a4055ebbb404c6cb -r833095dbbe2b21a989b05f48bd7ddc390ad964cb
--- App/Drivers/CPLD.c	(.../CPLD.c)	(revision c91e9da338d92432930d3589a4055ebbb404c6cb)
+++ App/Drivers/CPLD.c	(.../CPLD.c)	(revision 833095dbbe2b21a989b05f48bd7ddc390ad964cb)
@@ -47,15 +47,15 @@
 #define TGL_OFF_REQ()      gioToggleBit( gioPORTB, OFF_REQUEST_GIO_PORT_PIN)
 #define SET_WD_PET()       gioSetBit( gioPORTB, WD_PET_GIO_PORT_PIN, PIN_SIGNAL_HIGH )
 #define SET_OFF_REQ()      gioSetBit( gioPORTB, OFF_REQUEST_GIO_PORT_PIN, PIN_SIGNAL_HIGH )
-#define SET_GREEN()        mibspiREG5->PC3 |= GREEN_SPI5_PORT_MASK
-#define SET_BLUE()         mibspiREG5->PC3 |= BLUE_SPI5_PORT_MASK
-#define SET_RED()          mibspiREG5->PC3 |= RED_SPI5_PORT_MASK
+#define SET_GREEN()        {mibspiREG5->PC3 |= GREEN_SPI5_PORT_MASK;}
+#define SET_BLUE()         {mibspiREG5->PC3 |= BLUE_SPI5_PORT_MASK;}
+#define SET_RED()          {mibspiREG5->PC3 |= RED_SPI5_PORT_MASK;}
 
 #define CLR_WD_PET()       gioSetBit( gioPORTB, WD_PET_GIO_PORT_PIN, PIN_SIGNAL_LOW )
 #define CLR_OFF_REQ()      gioSetBit( gioPORTB, OFF_REQUEST_GIO_PORT_PIN, PIN_SIGNAL_LOW )
-#define CLR_GREEN()        mibspiREG5->PC3 &= ~GREEN_SPI5_PORT_MASK
-#define CLR_BLUE()         mibspiREG5->PC3 &= ~BLUE_SPI5_PORT_MASK
-#define CLR_RED()          mibspiREG5->PC3 &= ~RED_SPI5_PORT_MASK
+#define CLR_GREEN()        {mibspiREG5->PC3 &= ~GREEN_SPI5_PORT_MASK;}
+#define CLR_BLUE()         {mibspiREG5->PC3 &= ~BLUE_SPI5_PORT_MASK;}
+#define CLR_RED()          {mibspiREG5->PC3 &= ~RED_SPI5_PORT_MASK;}
 
 // ***************************** TEST CODE ******************************
 // TODO - remove later