Index: firmware/App/Controllers/RTC.c =================================================================== diff -u -r273e3e6967ebff6f1ff3499576ac839a744cff5d -r57fb003722dc1dad3fbcd76472c15710f11a444d --- firmware/App/Controllers/RTC.c (.../RTC.c) (revision 273e3e6967ebff6f1ff3499576ac839a744cff5d) +++ firmware/App/Controllers/RTC.c (.../RTC.c) (revision 57fb003722dc1dad3fbcd76472c15710f11a444d) @@ -20,7 +20,6 @@ #include "RTC.h" #include "mibspi.h" -// TODO: TRANSFER SOME OF THE DEFINES TO COMMON.H // ********** Definitions ********** #define RTC_REG_1_12_HOUR_MODE_MASK 0x0004 // 12-hour mode mask @@ -66,7 +65,7 @@ #define MIBSPI_BUFFER_MODE_BIT_SHIFT_13 13U #define MIBSPI_CHIP_SELECT_BIT_SHIFT_12 12U -#define MIBSPI_NO_WDELAY_BIT_SHIFT_10 10U +#define MIBSPI_NO_WDELAY_BIT_SHIFT_10 10U #define MIBSPI_LOCK_TRANS_BIT_SHIFT_11 11U #define MIBSPI_DATA_FORMAT_ZERO_BIT_SHIFT_8 8U #define MIBSPI_BUFFER_TRANS_BIT_SHIFT_8 8U @@ -82,6 +81,7 @@ #define RTC_READ_FROM_REG0 0x00A0 // RTC read from address 0 #define RTC_WRITE_TO_REG3 0x0023 // Seconds register +#define RTC_WRITE_TO_REG0 0x0020 #define RTC_PREP_RAM_READ_WRITE 0x003A // RTC cmd prior to RAM ops #define RTC_WRITE_TO_RAM 0x003C // RTC RAM write #define RTC_READ_FROM_RAM 0x00BD // RTC RAM read @@ -175,6 +175,7 @@ static U16 rxBuffer[ MIBSPI_MAX_BUFFER_LENGTH + 1 ]; static U16 txBuffer[ MIBSPI_MAX_BUFFER_LENGTH + 1 ]; +static U16 prepRAMBuffer[ RTC_RAM_PREP_BUFFER_LENGTH ]; static U16 RAMBuffer[ MIBSPI_MAX_BUFFER_LENGTH ]; // ********** Private function prototypes ********* @@ -232,14 +233,17 @@ void setRTCTimestamp( U08 secs, U08 mins, U08 hours, U08 days, U08 months, U16 years ) { hasWriteToRTCRequested = TRUE; - txBuffer[0] = RTC_WRITE_TO_REG3; - txBuffer[1] = convertDecimal2BCD( secs ); - txBuffer[2] = convertDecimal2BCD( mins ); - txBuffer[3] = convertDecimal2BCD( hours ); - txBuffer[4] = convertDecimal2BCD( days ); - txBuffer[5] = 0; - txBuffer[6] = convertDecimal2BCD( months ); - txBuffer[7] = convertDecimal2BCD( years - YEAR_2000 ); + txBuffer[ 0 ] = RTC_WRITE_TO_REG0; + txBuffer[ 1 ] = 0x0000; + txBuffer[ 2 ] = 0x0000; + txBuffer[ 3 ] = 0x0000; + txBuffer[ 4 ] = convertDecimal2BCD( secs ); + txBuffer[ 5 ] = convertDecimal2BCD( mins ); + txBuffer[ 6 ] = convertDecimal2BCD( hours ); + txBuffer[ 7 ] = convertDecimal2BCD( days ); + txBuffer[ 8 ] = convertDecimal2BCD( 0 ); // Weekdays will not be used + txBuffer[ 9 ] = convertDecimal2BCD( months ); + txBuffer[ 10 ] = convertDecimal2BCD( years - YEAR_2000 ); } /************************************************************************* @@ -402,15 +406,14 @@ RTCRAMState = RTC_RAM_STATE_BUSY; hasWriteToRAMRequested = TRUE; RAMBufferLength = length; - txBuffer[ RTC_PREP_RAM_INDEX ] = RTC_PREP_RAM_READ_WRITE; - txBuffer[ RTC_RAM_HIGH_ADDRESS_INDEX ] = ( address >> SHIFT_8_BITS_FOR_BYTE_SHIFT ); - txBuffer[ RTC_RAM_LOW_ADDRESS_INDEX ] = ( address & MASK_OFF_MSB ); - txBuffer[ RTC_RAM_COMMAND_INDEX ] = RTC_WRITE_TO_RAM; + prepRAMBuffer[ RTC_PREP_RAM_INDEX ] = RTC_PREP_RAM_READ_WRITE; + prepRAMBuffer[ RTC_RAM_HIGH_ADDRESS_INDEX ] = ( address >> SHIFT_8_BITS_FOR_BYTE_SHIFT ); + prepRAMBuffer[ RTC_RAM_LOW_ADDRESS_INDEX ] = ( address & MASK_OFF_MSB ); + txBuffer[ BUFFER_INDEX_0 ] = RTC_WRITE_TO_RAM; for ( i = 0; i < RAMBufferLength; i++ ) { - // The first 3 elements in txBuffer are filled - txBuffer[ i + BUFFER_INDEX_4 ] = data[ i ]; + txBuffer[ i + BUFFER_INDEX_1 ] = data[ i ]; } } } @@ -451,14 +454,15 @@ RTCRAMState = RTC_RAM_STATE_BUSY; hasReadFromRAMRequested = TRUE; RAMBufferLength = length; - txBuffer[ RTC_PREP_RAM_INDEX ] = RTC_PREP_RAM_READ_WRITE; - txBuffer[ RTC_RAM_HIGH_ADDRESS_INDEX ] = ( address >> SHIFT_8_BITS_FOR_BYTE_SHIFT ); - txBuffer[ RTC_RAM_LOW_ADDRESS_INDEX ] = ( address & MASK_OFF_MSB ); - txBuffer[ RTC_RAM_COMMAND_INDEX ] = RTC_READ_FROM_RAM; - for ( i = 0; i < length; i++ ) + prepRAMBuffer[ RTC_PREP_RAM_INDEX ] = RTC_PREP_RAM_READ_WRITE; + prepRAMBuffer[ RTC_RAM_HIGH_ADDRESS_INDEX ] = ( address >> SHIFT_8_BITS_FOR_BYTE_SHIFT ); + prepRAMBuffer[ RTC_RAM_LOW_ADDRESS_INDEX ] = ( address & MASK_OFF_MSB ); + txBuffer[ BUFFER_INDEX_0 ] = RTC_READ_FROM_RAM; + + for ( i = 0; i < RAMBufferLength; i++ ) { - txBuffer[ i + BUFFER_INDEX_4 ] = 0x0000; + txBuffer[ i + BUFFER_INDEX_1 ] = 0x0000; } } } @@ -947,7 +951,6 @@ else if ( timeCounter == TIMER_COUNTER_TO_REQUEST_READ ) { prepBufferForReadCommand( RTC_GENERAL_BUFFER_LENGTH ); - result = RTC_EXEC_STATE_READ; } else @@ -970,22 +973,18 @@ static RTC_EXEC_STATE_T handleExecWriteState( void ) { RTC_EXEC_STATE_T result = RTC_EXEC_STATE_WRITE; - BOOL isStatusOk = serviceRTC( txBuffer, rxBuffer, RTC_TIMESTAMP_BUFFER_LENGTH ); if ( RTCServiceState == RTC_SERVICE_COMPLETE && isStatusOk ) { // Reset the counter to start with the new read timeCounter = 1; - hasWriteToRTCRequested = FALSE; - result = RTC_EXEC_STATE_IDLE; } else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) { result = RTC_EXEC_STATE_FAULT; - hasWriteToRTCRequested = FALSE; } @@ -1004,9 +1003,8 @@ static RTC_EXEC_STATE_T handleExecPrepRAMState( void ) { RTC_EXEC_STATE_T result = RTC_EXEC_STATE_PREP_RAM; + BOOL isStatusOk = serviceRTC( prepRAMBuffer, RAMBuffer, RTC_RAM_PREP_BUFFER_LENGTH ); - BOOL isStatusOk = serviceRTC( txBuffer, RAMBuffer, RTC_RAM_PREP_BUFFER_LENGTH ); - if ( RTCServiceState == RTC_SERVICE_COMPLETE && isStatusOk ) { if ( hasWriteToRAMRequested ) @@ -1073,17 +1071,13 @@ if ( RTCServiceState == RTC_SERVICE_COMPLETE && isStatusOk ) { result = RTC_EXEC_STATE_IDLE; - RTCRAMStatus = RTC_RAM_STATUS_COMPLETE; - hasReadFromRAMRequested = FALSE; } else if ( RTCServiceState == RTC_SERVICE_COMPLETE ) { result = RTC_EXEC_STATE_IDLE; - RTCRAMStatus = RTC_RAM_STATUS_COMPLETE; - hasReadFromRAMRequested = FALSE; }