Index: firmware/App/Controllers/RTC.c =================================================================== diff -u -r451eb63c75e6af4d6498b598a7001eb5433a812d -rdfdd3cf20e2c41415a6b16d5b0c9dc53819b7399 --- firmware/App/Controllers/RTC.c (.../RTC.c) (revision 451eb63c75e6af4d6498b598a7001eb5433a812d) +++ firmware/App/Controllers/RTC.c (.../RTC.c) (revision dfdd3cf20e2c41415a6b16d5b0c9dc53819b7399) @@ -204,7 +204,7 @@ * @param none * @return none *************************************************************************/ -void initRTC() + void initRTC() { RTCSelfTestState = RTC_SELF_TEST_STATE_START; } @@ -530,6 +530,18 @@ } // ********** Private functions ********* + +void mibspiNotification(mibspiBASE_t *mibspi, uint32 flags) +{ + +} + +void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32 group) +{ + +} + + /************************************************************************* * @brief serviceRTC * The serviceRTC is the interface to the RTC chip: @@ -651,27 +663,27 @@ controlReg2 = controlReg2 & ~RTC_REG_2_TSF2; controlReg3 = controlReg3 & ~RTC_REG_3_BF; - if ( ! controlReg1 & RTC_REG_1_12_HOUR_MODE ) + if ( controlReg1 & RTC_REG_1_12_HOUR_MODE ) { // Set the alarm for 24 hour mode hasTestPassed = FALSE; } - if ( ! controlReg1 & RTC_REG_1_PORO ) + if ( controlReg1 & RTC_REG_1_PORO ) { // Set the alarm for PORO low mode hasTestPassed = FALSE; } - if ( ! controlReg1 & RTC_REG_1_CLK_STOPPED ) + if ( controlReg1 & RTC_REG_1_CLK_STOPPED ) { // Set the alarm for clock stopped mode hasTestPassed = FALSE; } - if ( ! controlReg1 & RTC_REG_1_UNUSED ) + if ( controlReg1 & RTC_REG_1_UNUSED ) { // Set the alarm for unused bit set to 1 mode hasTestPassed = FALSE; } - if ( ! controlReg1 & RTC_REG_1_EXT_CLK_MODE ) + if ( controlReg1 & RTC_REG_1_EXT_CLK_MODE ) { // Set the alarm for clock set on external mode hasTestPassed = FALSE; @@ -847,15 +859,13 @@ | (uint16)( (uint16)MIBSPI_NO_WDELAY << MIBSPI_NO_WDELAY_BIT_SHIT ) /* enable WDELAY */ | (uint16)( (uint16)MIBSPI_LOCK_TG << MIBSPI_LOCK_TRANS_BIT_SHIFT ) /* lock transmission */ | (uint16)( (uint16)MIBSPI_DATA_FORMAT_ZERO << MIBSPI_DATA_FORMAT_ZERO_BIT_SHIFT ) /* data format */ - /*SAFETYMCUSW 334 S MR:10.5 "LDRA Tool issue" */ | ((uint16)( ~((uint16)0xFFU ^ (uint16)CS_0)) & (uint16)0x00FFU ); /* chip select */ i++; } mibspiRAM3->tx[i].control = (uint16)( (uint16)MIBSPI_CONTINUOUS_MODE << MIBSPI_BUFFER_MODE_BIT_SHIFT ) /* buffer mode */ | (uint16)( (uint16)MIBSPI_CHIP_SELECT_DEACTIVE << MIBSPI_CHIP_SELECT_BIT_SHIFT ) /* chip select hold */ | (uint16)( (uint16)MIBSPI_NO_WDELAY << MIBSPI_NO_WDELAY_BIT_SHIT ) /* enable WDELAY */ | (uint16)( (uint16)MIBSPI_DATA_FORMAT_ZERO << MIBSPI_DATA_FORMAT_ZERO_BIT_SHIFT ) /* data format */ - /*SAFETYMCUSW 334 S MR:10.5 "LDRA Tool issue" */ | ((uint16)( ~((uint16)0xFFU ^ (uint16)CS_0)) & (uint16)0x00FFU ); /* chip select */ transferStatus = TRUE; @@ -981,7 +991,7 @@ result = RTC_EXEC_STATE_IDLE; } - else if ( RTCServiceState == RTC_SERVICE_COMPLETE && ! isStatusOk ) + else if ( RTCServiceState == RTC_SERVICE_COMPLETE && !isStatusOk ) { result = RTC_EXEC_STATE_FAULT;