Index: firmware/App/Controllers/RTC.c
===================================================================
diff -u -r53165945d15dd7a30b3d194573507cbd31e5314f -r97ca7c8136ce4d7f49184a80b40c0487ac5c2d5e
--- firmware/App/Controllers/RTC.c	(.../RTC.c)	(revision 53165945d15dd7a30b3d194573507cbd31e5314f)
+++ firmware/App/Controllers/RTC.c	(.../RTC.c)	(revision 97ca7c8136ce4d7f49184a80b40c0487ac5c2d5e)
@@ -66,7 +66,7 @@
 
 #define MIBSPI_BUFFER_MODE_BIT_SHIFT_13     13U
 #define MIBSPI_CHIP_SELECT_BIT_SHIFT_12     12U
-#define MIBSPI_NO_WDELAY_BIT_SHIT_10        10U
+#define MIBSPI_NO_WDELAY_BIT_SHIFT_10        10U
 #define MIBSPI_LOCK_TRANS_BIT_SHIFT_11      11U
 #define MIBSPI_DATA_FORMAT_ZERO_BIT_SHIFT_8 8U
 #define MIBSPI_BUFFER_TRANS_BIT_SHIFT_8     8U
@@ -850,15 +850,15 @@
         {
             mibspiRAM3->tx[i].control = (uint16)( (uint16)MIBSPI_CONTINUOUS_MODE    << MIBSPI_BUFFER_MODE_BIT_SHIFT_13 )       /* buffer mode */
                                       | (uint16)( (uint16)MIBSPI_CHIP_SELECT_ACTIVE << MIBSPI_CHIP_SELECT_BIT_SHIFT_12 )       /* chip select hold */
-                                      | (uint16)( (uint16)MIBSPI_NO_WDELAY          << MIBSPI_NO_WDELAY_BIT_SHIT_10 )          /* enable WDELAY */
+                                      | (uint16)( (uint16)MIBSPI_NO_WDELAY          << MIBSPI_NO_WDELAY_BIT_SHIFT_10 )          /* enable WDELAY */
                                       | (uint16)( (uint16)MIBSPI_LOCK_TG            << MIBSPI_LOCK_TRANS_BIT_SHIFT_11 )        /* lock transmission */
                                       | (uint16)( (uint16)MIBSPI_DATA_FORMAT_ZERO   << MIBSPI_DATA_FORMAT_ZERO_BIT_SHIFT_8 )  /* data format */
                                       | ((uint16)( ~((uint16)0xFFU ^ (uint16)CS_0)) & (uint16)0x00FFU );                    /* chip select */
             i++;
         }
         mibspiRAM3->tx[i].control = (uint16)( (uint16)MIBSPI_CONTINUOUS_MODE        << MIBSPI_BUFFER_MODE_BIT_SHIFT_13 )       /* buffer mode */
                                   | (uint16)( (uint16)MIBSPI_CHIP_SELECT_DEACTIVE   << MIBSPI_CHIP_SELECT_BIT_SHIFT_12 )       /* chip select hold */
-                                  | (uint16)( (uint16)MIBSPI_NO_WDELAY              << MIBSPI_NO_WDELAY_BIT_SHIT_10 )          /* enable WDELAY */
+                                  | (uint16)( (uint16)MIBSPI_NO_WDELAY              << MIBSPI_NO_WDELAY_BIT_SHIFT_10 )          /* enable WDELAY */
                                   | (uint16)( (uint16)MIBSPI_DATA_FORMAT_ZERO       << MIBSPI_DATA_FORMAT_ZERO_BIT_SHIFT_8 )  /* data format */
                                   | ((uint16)( ~((uint16)0xFFU ^ (uint16)CS_0)) & (uint16)0x00FFU );                        /* chip select */