Index: firmware/App/Controllers/Valves.c =================================================================== diff -u -r8ed20540782ec6b81fc870c33c7a7e6f589a6ff3 -r1145e9197855b4f2cb79eb407d3899059b0ca410 --- firmware/App/Controllers/Valves.c (.../Valves.c) (revision 8ed20540782ec6b81fc870c33c7a7e6f589a6ff3) +++ firmware/App/Controllers/Valves.c (.../Valves.c) (revision 1145e9197855b4f2cb79eb407d3899059b0ca410) @@ -40,7 +40,7 @@ // Valve dialyzer inlet defines #define VDI_SET_PID_BIT_MASK 0x0010 ///< VDI enable PID bit mask #define VDI_SET_BYPASS_BIT_MASK 0x0020 ///< VDI enable bypass bit mask -#define VDI_RESET_CONTROL_BIT_MASK 0x03CF ///< VDI reset control bit mask +#define VDI_RESET_CONTROL_BIT_MASK 0x0FCF ///< VDI reset control bit mask #define VDI_INIT_STATUS_BIT_MASK 0x0040 ///< VDI init status bit mask #define VDI_ENABLE_PID_STATUS_BIT_MASK 0x0080 ///< VDI PID status bit mask @@ -49,7 +49,7 @@ // Valve dialyzer outlet defines #define VDO_SET_PID_BIT_MASK 0x0040 ///< VDO enable PID interface #define VDO_SET_BYPASS_BIT_MASK 0x0080 ///< VDO enable bypass bit mask -#define VDO_RESET_CONTROL_BIT_MASK 0x033F ///< VDO reset control bit mask +#define VDO_RESET_CONTROL_BIT_MASK 0x09FF ///< VDO reset control bit mask #define VDO_INIT_STATUS_BIT_MASK 0x0200 ///< VDO init status bit mask #define VDO_ENABLE_PID_STATUS_BIT_MASK 0x0400 ///< VDO enable PID status bit mask @@ -58,7 +58,7 @@ // Valve blood arterial defines #define VBA_SET_PID_BIT_MASK 0x0001 ///< VBA enable PID interface #define VBA_SET_BYPASS_BIT_MASK 0x0002 ///< VBA enable bypass interface -#define VBA_RESET_CONTROL_BIT_MASK 0x03FC ///< VBA reset control bit mask +#define VBA_RESET_CONTROL_BIT_MASK 0x0FFC ///< VBA reset control bit mask #define VBA_INIT_STATUS_BIT_MASK 0x0001 ///< VBA init status bit mask #define VBA_ENABLE_PID_STATUS_BIT_MASK 0x0002 ///< VBA PID status bit mask @@ -67,7 +67,7 @@ // Valve blood venous defines #define VBV_SET_PID_BIT_MASK 0x0004 ///< VBV enable PID interface bit mask #define VBV_SET_BYPASS_BIT_MASK 0x0008 ///< VBV enable bypass interface bit mask -#define VBV_RESET_CONTROL_BIT_MASK 0x03F3 ///< VBV reset control bit mask +#define VBV_RESET_CONTROL_BIT_MASK 0x0FF3 ///< VBV reset control bit mask #define VBV_INIT_STATUS_BIT_MASK 0x0008 ///< VBV init status bit mask #define VBV_ENABLE_PID_STATUS_BIT_MASK 0x0010 ///< VBV PID status bit mask @@ -219,12 +219,44 @@ static const U16 VALVE_CONTROL_MODES_RESET_BITS[ NUM_OF_VALVES ] = { VDI_RESET_CONTROL_BIT_MASK, VDO_RESET_CONTROL_BIT_MASK, VBA_RESET_CONTROL_BIT_MASK, VBV_RESET_CONTROL_BIT_MASK }; ///< Valves control modes rest bits -static const U16 VALVE_CONTROL_STATUS_BITS[ NUM_OF_VALVES ][ NUM_OF_VALVE_CONTROL_STATUS ] = - { { VDI_INIT_STATUS_BIT_MASK, VDI_ENABLE_PID_STATUS_BIT_MASK, VDI_ENABLE_BYPASS_STATUS_BIT_MASK, VDI_RESET_CONTROL_BIT_MASK }, - { VDO_INIT_STATUS_BIT_MASK, VDO_ENABLE_PID_STATUS_BIT_MASK, VDO_ENABLE_BYPASS_STATUS_BIT_MASK, VDO_RESET_CONTROL_BIT_MASK }, - { VBA_INIT_STATUS_BIT_MASK, VBA_ENABLE_PID_STATUS_BIT_MASK, VBA_ENABLE_BYPASS_STATUS_BIT_MASK, VBA_RESET_CONTROL_BIT_MASK }, - { VBV_INIT_STATUS_BIT_MASK, VBV_ENABLE_PID_STATUS_BIT_MASK, VBV_ENABLE_BYPASS_STATUS_BIT_MASK, VBV_RESET_CONTROL_BIT_MASK } }; ///< Valves control status bits +/// Valve check entries +enum valve_check_entries +{ + VALVE_CHECK_EXPECTED_CONTROL = 0, ///< Valve check expected control values + VALVE_CHECK_BIT_MASK, ///< Valve check bit mask + NUM_OF_VALVE_CHECK_ENTRIES, ///< Number of valve check entries +}; +#define VALVE_INIT_STATUS_BIT 0x0001 ///< valve init +#define VALVE_ENABLE_PID_STATUS_BIT 0x0002 ///< valve PID enabled +#define VALVE_ENABLE_BYPASS_STATUS_BIT 0x0004 ///< valve bypass + +#define VALVE_PID_CHECK ( VALVE_INIT_STATUS_BIT | VALVE_ENABLE_PID_STATUS_BIT ) +#define VALVE_CHECK_MASK ( VALVE_INIT_STATUS_BIT | VALVE_ENABLE_PID_STATUS_BIT | VALVE_ENABLE_BYPASS_STATUS_BIT ) +#define VALVE_CHECK_BITS_PER_VALVE ( 3 ) + +#define VDI_POS ( 2 ) +#define VDO_POS ( 3 ) +#define VBA_POS ( 0 ) +#define VBV_POS ( 1 ) +#define VDI_VALVE_CHECK ( VALVE_PID_CHECK << ( VDI_POS * VALVE_CHECK_BITS_PER_VALVE ) ) +#define VDO_VALVE_CHECK ( VALVE_PID_CHECK << ( VDO_POS * VALVE_CHECK_BITS_PER_VALVE ) ) +#define VBA_VALVE_CHECK ( VALVE_PID_CHECK << ( VBA_POS * VALVE_CHECK_BITS_PER_VALVE ) ) +#define VBV_VALVE_CHECK ( VALVE_PID_CHECK << ( VBV_POS * VALVE_CHECK_BITS_PER_VALVE ) ) + +#define VDI_VALVE_CHECK_MASK ( ( VALVE_CHECK_MASK << ( 2 * VALVE_CHECK_BITS_PER_VALVE ) ) ) +#define VDO_VALVE_CHECK_MASK ( ( VALVE_CHECK_MASK << ( 3 * VALVE_CHECK_BITS_PER_VALVE ) ) ) +#define VBA_VALVE_CHECK_MASK ( ( VALVE_CHECK_MASK << ( 0 * VALVE_CHECK_BITS_PER_VALVE ) ) ) +#define VBV_VALVE_CHECK_MASK ( ( VALVE_CHECK_MASK << ( 1 * VALVE_CHECK_BITS_PER_VALVE ) ) ) + +static const U16 VALVE_CHECK[ NUM_OF_VALVES ][ NUM_OF_VALVE_CHECK_ENTRIES ] = +{ { VDI_VALVE_CHECK, VDI_VALVE_CHECK_MASK }, + { VDO_VALVE_CHECK, VDO_VALVE_CHECK_MASK }, + { VBA_VALVE_CHECK, VBA_VALVE_CHECK_MASK }, + { VBV_VALVE_CHECK, VBV_VALVE_CHECK_MASK } +}; ///< Valve check entries + + static U16 valvesControlSetBits; ///< Valves control set bit static OPN_CLS_STATE_T valveAirTrapStatus; ///< Air trap valve status (open/close) static HD_VALVES_CAL_RECORD_T valvesCalibrationRecord; ///< Valves calibration record. @@ -1004,65 +1036,30 @@ * The areValvesEnabled function checks the current valves status from FPGA * to the enable bit mask of each valve. If any of the valves is not enabled * the function raises an alarm. - * @details Inputs: valvesStatus + * @details Inputs: valvesStatus, VALVE_CHECK * @details Outputs: none - * @return Returns TRUE if all the valves are enabled properly + * @return Returns TRUE if all the valves status bits are correct *************************************************************************/ static BOOL areValvesFunctional( void ) { BOOL result = TRUE; VALVE_T valve; - VALVE_MODE_T mode; // Get the status of the valves from FPGA - U16 status = getFPGAValvesStatus(); + U16 status = getFPGAValvesStatus(); for ( valve = VDI; valve < NUM_OF_VALVES; valve++ ) { - mode = valvesStatus[ valve ].controlMode; - - // Depending on the control mode of the valve, different bit masks will be checked - if ( mode == VALVE_CONTROL_MODE_ENABLE_PID ) + U16 statusCheck = status & VALVE_CHECK[ valve ][ VALVE_CHECK_BIT_MASK ]; + if ( VALVE_CHECK[ valve ][ VALVE_CHECK_EXPECTED_CONTROL ] != statusCheck ) { - if ( FALSE == ( status & VALVE_CONTROL_STATUS_BITS[ valve ][ VALVE_CONTROL_STATUS_INITIALIZED ] ) ) - { - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_VALVE_NOT_FUNCTIONAL, (U32)valve, (U32)mode ); - result = FALSE; - } - if ( FALSE == ( status & VALVE_CONTROL_STATUS_BITS[ valve ][ VALVE_CONTROL_STATUS_PID_ENABLED ] ) ) - { - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_VALVE_NOT_FUNCTIONAL, (U32)valve, (U32)mode ); - result = FALSE; - } - } - else if ( mode == VALVE_CONTROL_MODE_ENABLE_BYPASS ) - { - if ( FALSE == ( status & VALVE_CONTROL_STATUS_BITS[ valve ][ VALVE_CONTROL_STATUS_BYPASS_ENABLED ] ) ) - { - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_VALVE_NOT_FUNCTIONAL, (U32)valve, (U32)mode ); - result = FALSE; - } - } - else if ( mode == VALVE_CONTROL_MODE_DISABLE_ALL ) - { - if ( FALSE == ( status & ( ~VALVE_CONTROL_STATUS_BITS[ valve ][ VALVE_CONTROL_STATUS_DISABLED ] ) ) ) - { - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_VALVE_NOT_FUNCTIONAL, (U32)valve, (U32)mode ); - result = FALSE; - } - } -#ifndef _VECTORCAST_ - // The default cannot be reached in VectorCAST since the cases are run in a for loop - // Invalid mode was selected - else - { - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_SOFTWARE_FAULT, SW_FAULT_ID_HD_VALVES_INVALID_CONTROL_MODE_SELECTED, (U32)valve ); + SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_VALVE_NOT_FUNCTIONAL, (U32)valve, (U32)status); result = FALSE; - } -#endif + } } return result; + } /*********************************************************************//**