Index: firmware/App/Drivers/Comm.c
===================================================================
diff -u -reff7b1575f008f81b29ef906f6346fac6012d3ab -r24b2fe72608344e67ef37234085d15ad5e4fcc37
--- firmware/App/Drivers/Comm.c	(.../Comm.c)	(revision eff7b1575f008f81b29ef906f6346fac6012d3ab)
+++ firmware/App/Drivers/Comm.c	(.../Comm.c)	(revision 24b2fe72608344e67ef37234085d15ad5e4fcc37)
@@ -1,176 +1,263 @@
-/**************************************************************************
- *
- *  Copyright (c) 2019-2019 Diality Inc. - All Rights Reserved.
- *
- *  THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
- *  WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
- *
- *  @file Comm.c
- *
- *  @date 28-Oct-2019
- *  @author S. Nash
- *
- *  @brief Support for communication.
- *
- **************************************************************************/
+/**************************************************************************
+*
+* Copyright (c) 2019-2022 Diality Inc. - All Rights Reserved.
+*
+* THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
+* WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
+*
+* @file    Comm.c
+*
+* @author  (last)      Sean Nash
+* @date    (last)      24-Sep-2020
+*
+* @author  (original)  Dara Navaei
+* @date    (original)  05-Nov-2019
+*
+***************************************************************************/
 
 #include "can.h"
 #include "sci.h"
 #include "sys_dma.h"
 
 #include "Comm.h"
 
+/**
+ *  @addtogroup CommLowLevel
+ *  @{
+ */
+
 // ********** private definitions **********
 
-#define DMA_CH_STATUS_BIT(ch)       ((U32)1U << (ch))
+#define DMA_CH_STATUS_BIT(ch)       ((U32)1U << (ch))               ///< Macro to get bit mask for status of a given DMA channel.
 
-/*************************************************************************
- * @brief setSCI1DMAReceiveInterrupt
- * The setSCI1DMAReceiveInterrupt function enables DMA receive interrupts \n
+// ********** private data **********
+
+static volatile BOOL canXmitsInProgress = FALSE;                    ///< Flag indicates a CAN frame transmit is in progress.
+#ifdef DEBUG_ENABLED
+    static volatile BOOL uartXmitsInProgress = FALSE;
+#endif
+
+/*********************************************************************//**
+ * @brief
+ * The signalCANXmitsInitiated function sets the CAN transmits in
+ * progress flag.
+ * @details Inputs: none
+ * @details Outputs: canXmitsInProgress
+ * @return none
+ *************************************************************************/
+void signalCANXmitsInitiated( void )
+{
+    canXmitsInProgress = TRUE;
+}
+
+/*********************************************************************//**
+ * @brief
+ * The signalCANXmitsCompleted function resets the CAN transmits in
+ * progress flag.
+ * @details Inputs: none
+ * @details Outputs: canXmitsInProgress
+ * @return none
+ *************************************************************************/
+void signalCANXmitsCompleted( void )
+{
+    canXmitsInProgress = FALSE;
+}
+
+/*********************************************************************//**
+ * @brief
+ * The signalSCI1XmitsInitiated function sets the SCI1 transmits in
+ * progress flag.
+ * @details Inputs: none
+ * @details Outputs: uartXmitsInProgress
+ * @return none
+ *************************************************************************/
+#ifdef DEBUG_ENABLED
+void signalSCI1XmitsInitiated( void )
+{
+    uartXmitsInProgress = TRUE;
+}
+#endif
+
+/*********************************************************************//**
+ * @brief
+ * The signalSCI1XmitsCompleted function resets the SCI1 transmits in
+ * progress flag.
+ * @details Inputs: none
+ * @details Outputs: uartXmitsInProgress
+ * @return none
+ *************************************************************************/
+#ifdef DEBUG_ENABLED
+void signalSCI1XmitsCompleted( void )
+{
+    uartXmitsInProgress = FALSE;
+}
+#endif
+
+/*********************************************************************//**
+ * @brief
+ * The setSCI1DMAReceiveInterrupt function enables DMA receive interrupts
  * for the SCI1 peripheral.
- * @details
- * Inputs : none
- * Outputs : DMA receive interrupt is enabled.
- * @param none
+ * @details Inputs: none
+ * @details Outputs: DMA receive interrupt is enabled.
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void setSCI1DMAReceiveInterrupt( void )
 {
     sciREG->SETINT = SCI_DMA_RECEIVE_INT;
 }
+#endif
 
-/*************************************************************************
- * @brief setSCI1DMATransmitInterrupt
- * The setSCI1DMATransmitInterrupt function enables DMA transmit interrupts \n
+/*********************************************************************//**
+ * @brief
+ * The setSCI1DMATransmitInterrupt function enables DMA transmit interrupts
  * for the SCI1 peripheral.
- * @details
- * Inputs : none
- * Outputs : DMA transmit interrupt is enabled.
- * @param none
+ * @details Inputs: none
+ * @details Outputs: DMA transmit interrupt is enabled.
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void setSCI1DMATransmitInterrupt( void )
 {
     sciREG->SETINT = SCI_DMA_TRANSMIT_INT;
 }
+#endif
 
-/*************************************************************************
- * @brief clearSCI1DMAReceiveInterrupt
- * The clearSCI1DMAReceiveInterrupt function disables DMA receive interrupts \n
+/*********************************************************************//**
+ * @brief
+ * The clearSCI1DMAReceiveInterrupt function disables DMA receive interrupts
  * for the SCI1 peripheral.
- * @details
- * Inputs : none
- * Outputs : DMA receive interrupt is disabled.
- * @param none
+ * @details Inputs: none
+ * @details Outputs: DMA receive interrupt is disabled.
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void clearSCI1DMAReceiveInterrupt( void )
 {
     sciREG->CLEARINT = SCI_DMA_RECEIVE_INT;
 }
+#endif
 
-/*************************************************************************
- * @brief clearSCI1DMATransmitInterrupt
- * The clearSCI1DMATransmitInterrupt function disables DMA transmit interrupts \n
+/*********************************************************************//**
+ * @brief
+ * The clearSCI1DMATransmitInterrupt function disables DMA transmit interrupts
  * for the SCI1 peripheral.
- * @details
- * Inputs : none
- * Outputs : DMA transmit interrupt is disabled.
- * @param none
+ * @details Inputs: none
+ * @details Outputs: DMA transmit interrupt is disabled.
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void clearSCI1DMATransmitInterrupt( void )
 {
     sciREG->CLEARINT = SCI_DMA_TRANSMIT_INT;
 }
+#endif
 
-/*************************************************************************
- * @brief setSCI2DMAReceiveInterrupt
- * The setSCI2DMAReceiveInterrupt function enables DMA receive interrupts \n
+/*********************************************************************//**
+ * @brief
+ * The setSCI2DMAReceiveInterrupt function enables DMA receive interrupts
  * for the SCI2 peripheral.
- * @details
- * Inputs : none
- * Outputs : DMA receive interrupt is enabled.
- * @param none
+ * @details Inputs: none
+ * @details Outputs: DMA receive interrupt is enabled.
  * @return none
  *************************************************************************/
 void setSCI2DMAReceiveInterrupt( void )
 {
     scilinREG->SETINT = SCI_DMA_RECEIVE_INT;
 }
 
-/*************************************************************************
- * @brief setSCI2DMATransmitInterrupt
- * The setSCI2DMATransmitInterrupt function enables DMA transmit interrupts \n
+/*********************************************************************//**
+ * @brief
+ * The setSCI2DMATransmitInterrupt function enables DMA transmit interrupts
  * for the SCI2 peripheral.
- * @details
- * Inputs : none
- * Outputs : DMA transmit interrupt is enabled.
- * @param none
+ * @details Inputs: none
+ * @details Outputs: DMA transmit interrupt is enabled.
  * @return none
  *************************************************************************/
 void setSCI2DMATransmitInterrupt( void )
 {
     scilinREG->SETINT = SCI_DMA_TRANSMIT_INT;
 }
 
-/*************************************************************************
- * @brief clearSCI2DMAReceiveInterrupt
- * The clearSCI2DMAReceiveInterrupt function disables DMA receive interrupts \n
+/*********************************************************************//**
+ * @brief
+ * The clearSCI2DMAReceiveInterrupt function disables DMA receive interrupts
  * for the SCI2 peripheral.
- * @details
- * Inputs : none
- * Outputs : DMA receive interrupt is disabled.
- * @param none
+ * @details Inputs: none
+ * @details Outputs: DMA receive interrupt is disabled.
  * @return none
  *************************************************************************/
 void clearSCI2DMAReceiveInterrupt( void )
 {
     scilinREG->CLEARINT = SCI_DMA_RECEIVE_INT;
 }
 
-/*************************************************************************
- * @brief clearSCI2DMATransmitInterrupt
- * The clearSCI2DMATransmitInterrupt function disables DMA transmit interrupts \n
+/*********************************************************************//**
+ * @brief
+ * The clearSCI2DMATransmitInterrupt function disables DMA transmit interrupts
  * for the SCI2 peripheral.
- * @details
- * Inputs : none
- * Outputs : DMA transmit interrupt is disabled.
- * @param none
+ * @details Inputs: none
+ * @details Outputs: DMA transmit interrupt is disabled.
  * @return none
  *************************************************************************/
 void clearSCI2DMATransmitInterrupt( void )
 {
     scilinREG->CLEARINT = SCI_DMA_TRANSMIT_INT;
 }
 
-/*************************************************************************
- * @brief isSCI1DMATransmitInProgress
- * The isSCI2DMATransmitInProgress function determines whether a DMA transmit \n
+/*********************************************************************//**
+ * @brief
+ * The clearSCI1CommErrors function clears framing and/or overrun error flags \
+ * for the SCI1 peripheral.
+ * @details Inputs: none
+ * @details Outputs: SCI1 error flags cleared.
+ * @return none
+ *************************************************************************/
+void clearSCI1CommErrors( void )
+{
+    sciReceiveByte( sciREG );
+    sciREG->FLR |= ( SCI_FE_INT | SCI_OE_INT );
+}
+
+/*********************************************************************//**
+ * @brief
+ * The clearSCI2CommErrors function clears framing and/or overrun error flags
+ * for the SCI2 peripheral.
+ * @details Inputs: none
+ * @details Outputs: SCI2 error flags cleared.
+ * @return none
+ *************************************************************************/
+void clearSCI2CommErrors( void )
+{
+    sciReceiveByte( scilinREG );
+    scilinREG->FLR |= ( SCI_FE_INT | SCI_OE_INT );
+}
+
+/*********************************************************************//**
+ * @brief
+ * The isSCI2DMATransmitInProgress function determines whether a DMA transmit
  * is in progress on the SCI1 peripheral.
- * @details
- * Inputs : status registers
- * Outputs : none
- * @param none
+ * @details Inputs: status registers
+ * @details Outputs: none
  * @return TRUE if a transmit is in progress, FALSE if not
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 BOOL isSCI1DMATransmitInProgress( void )
 {
     BOOL transmitterBusy = ( ( sciREG->FLR & (U32)SCI_TX_INT ) == 0U ? TRUE : FALSE );
     BOOL dmaTransmitterBusy = ( ( dmaREG->PEND & DMA_CH_STATUS_BIT(DMA_CH3) ) != 0U ? TRUE : FALSE );
 
 
-    return ( ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
+    return ( ( TRUE == uartXmitsInProgress ) || ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
 }
+#endif
 
-/*************************************************************************
- * @brief isSCI2DMATransmitInProgress
- * The isSCI2DMATransmitInProgress function determines whether a DMA transmit \n
+/*********************************************************************//**
+ * @brief
+ * The isSCI2DMATransmitInProgress function determines whether a DMA transmit
  * is in progress on the SCI2 peripheral.
- * @details
- * Inputs : status registers
- * Outputs : none
- * @param none
+ * @details Inputs: status registers
+ * @details Outputs: none
  * @return TRUE if a transmit is in progress, FALSE if not
  *************************************************************************/
 BOOL isSCI2DMATransmitInProgress( void )
@@ -181,20 +268,19 @@
     return ( ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
 }
 
-/*************************************************************************
- * @brief isCAN1TransmitInProgress
- * The isCAN1TransmitInProgress function determines whether a transmit \n
+/*********************************************************************//**
+ * @brief
+ * The isCAN1TransmitInProgress function determines whether a transmit
  * is in progress on the CAN1 peripheral.
- * @details
- * Inputs : status registers
- * Outputs : none
- * @param none
+ * @details Inputs: status registers
+ * @details Outputs: none
  * @return TRUE if a transmit is in progress, FALSE if not
  *************************************************************************/
 BOOL isCAN1TransmitInProgress( void )
 {
-    BOOL result = ( ( canREG1->TXRQx[0] != 0 ) || ( canREG1->TXRQx[1] != 0 ) ? TRUE : FALSE );
+    BOOL result = ( ( TRUE == canXmitsInProgress ) || ( canREG1->TXRQx[ 0 ] != 0 ) || ( canREG1->TXRQx[ 1 ] != 0 ) ? TRUE : FALSE );
 
     return result;
 }
 
+/**@}*/