Index: firmware/App/Drivers/Comm.c
===================================================================
diff -u -rf7e3018ec6ab762fe08efb42b21fb2ca970174b0 -r2e6c750c202b7361d79488ce383e34f380e75413
--- firmware/App/Drivers/Comm.c	(.../Comm.c)	(revision f7e3018ec6ab762fe08efb42b21fb2ca970174b0)
+++ firmware/App/Drivers/Comm.c	(.../Comm.c)	(revision 2e6c750c202b7361d79488ce383e34f380e75413)
@@ -27,7 +27,9 @@
 // ********** private data **********
 
 static volatile BOOL canXmitsInProgress = FALSE;
-static volatile BOOL uartXmitsInProgress = FALSE;
+#ifdef DEBUG_ENABLED
+    static volatile BOOL uartXmitsInProgress = FALSE;
+#endif
 
 /*************************************************************************
  * @brief signalCANXmitsInitiated
@@ -69,10 +71,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void signalSCI1XmitsInitiated( void )
 {
     uartXmitsInProgress = TRUE;
 }
+#endif
 
 /*************************************************************************
  * @brief signalSCI1XmitsCompleted
@@ -84,10 +88,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void signalSCI1XmitsCompleted( void )
 {
     uartXmitsInProgress = FALSE;
 }
+#endif
 
 /*************************************************************************
  * @brief setSCI1DMAReceiveInterrupt
@@ -99,10 +105,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void setSCI1DMAReceiveInterrupt( void )
 {
     sciREG->SETINT = SCI_DMA_RECEIVE_INT;
 }
+#endif
 
 /*************************************************************************
  * @brief setSCI1DMATransmitInterrupt
@@ -114,10 +122,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void setSCI1DMATransmitInterrupt( void )
 {
     sciREG->SETINT = SCI_DMA_TRANSMIT_INT;
 }
+#endif
 
 /*************************************************************************
  * @brief clearSCI1DMAReceiveInterrupt
@@ -129,10 +139,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void clearSCI1DMAReceiveInterrupt( void )
 {
     sciREG->CLEARINT = SCI_DMA_RECEIVE_INT;
 }
+#endif
 
 /*************************************************************************
  * @brief clearSCI1DMATransmitInterrupt
@@ -144,10 +156,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void clearSCI1DMATransmitInterrupt( void )
 {
     sciREG->CLEARINT = SCI_DMA_TRANSMIT_INT;
 }
+#endif
 
 /*************************************************************************
  * @brief setSCI2DMAReceiveInterrupt
@@ -251,6 +265,7 @@
  * @param none
  * @return TRUE if a transmit is in progress, FALSE if not
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 BOOL isSCI1DMATransmitInProgress( void )
 {
     BOOL transmitterBusy = ( ( sciREG->FLR & (U32)SCI_TX_INT ) == 0U ? TRUE : FALSE );
@@ -259,6 +274,7 @@
 
     return ( ( TRUE == uartXmitsInProgress ) || ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
 }
+#endif
 
 /*************************************************************************
  * @brief isSCI2DMATransmitInProgress