Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -rc72332b4674a895aed7d56ca37ee5230548da3f6 -rcd9254008b61520e5c62059329f80a84efc0366d
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision c72332b4674a895aed7d56ca37ee5230548da3f6)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision cd9254008b61520e5c62059329f80a84efc0366d)
@@ -7,8 +7,8 @@
 *
 * @file    FPGA.c
 *
-* @author  (last)      Dara Navaei
-* @date    (last)      07-May-2022
+* @author  (last)      Dong Nguyen
+* @date    (last)      27-Sep-2022
 *
 * @author  (original)  Dara Navaei
 * @date    (original)  05-Nov-2019
@@ -78,7 +78,7 @@
 #define SCI2_RECEIVE_DMA_REQUEST        28                      ///< Serial port 2 receive DMA request line.
 #define SCI2_TRANSMIT_DMA_REQUEST       29                      ///< Serial port 2 transmit DMA request line.
 
-#define MAX_COMM_ERROR_RETRIES          5                       ///< Maximum consecutive FPGA communication error retries.
+#define MAX_COMM_ERROR_RETRIES          10                      ///< Maximum consecutive FPGA communication error retries.
 
 #define FPGA_INPUT_VOLTAGE_SCALE        3.0F                    ///< FPGA source and aux voltage.
 #define FPGA_PVN_VOLTAGE_SCALE          1.0F                    ///< FPGA pvn voltage.
@@ -91,7 +91,9 @@
 #define FPGA_FLUID_LEAK_STATE_MASK      0x0040                  ///< Bit mask for fluid leak detector.
 
 #define FPGA_BLOOD_LEAK_STATUS_MASK     0x1000                  ///< Bit mask for blood leak detector.
+#define FPGA_BLOOD_LEAK_ST_BIT_INDEX    12                      ///< Bit index for the blood leak self test status bit.
 #define FPGA_BLOOD_LEAK_ZERO_STATE_MASK 0x2000                  ///< Bit mask for blood leak detector zero.
+#define FPAG_BLOOD_LEAK_ZERO_BIT_INDEX  13                      ///< Bit index for the blood leak zero status bit.
 #define FPGA_BLOOD_LEAK_ZERO_CMD        0x02                    ///< Bit for blood leak detector zero command.
 #define FPGA_BLOOD_LEAK_SELF_TEST_CMD   0x01                    ///< Bit for blood leak detector self test command.
 
@@ -243,8 +245,10 @@
     U16 bloodLeakRxFIFOCount;                   ///< Reg 448.  Blood leak receive FIFO count.
     U08 bloodLeakRxFIFODataOut;                 ///< Reg 450.  Blood leak receive FIFO data out.
     U08 dummyByte;                              ///< Reg 451.  Dummy byte to meet the even of the data.
+    U16 fpgaCompatibilityRev;                   ///< Reg 452.  Compatibility revisions
     U08 bloodLeakSelfTestErrorCounter;          ///< Reg 452.  Blood leak self test error counter.
     U08 bloodLeakZeroErrorCounter;              ///< Reg 453.  Blood leak zero error counter.
+
 } FPGA_SENSORS_T;
 
 /// Record structure for FPGA continuous priority writes.
@@ -929,25 +933,18 @@
 {
     SELF_TEST_STATUS_T result;
 
-    // Check FPGA reported correct ID
+    // check FPGA reported correct ID
     if ( FPGA_EXPECTED_ID == fpgaHeader.fpgaId )
     {
         // Check FPGA compatibility w/ firmware
-        if ( fpgaHeader.fpgaRevMajor > MIN_HD_FPGA_MAJOR )
+        if ( HD_FPGA_COMPATIBILITY_REV == fpgaSensorReadings.fpgaCompatibilityRev )
         {
             result = SELF_TEST_STATUS_PASSED;
         }
         else
         {
-            if ( ( MIN_HD_FPGA_MAJOR == fpgaHeader.fpgaRevMajor ) && ( fpgaHeader.fpgaRev >= MIN_HD_FPGA_MINOR ) )
-            {
-                result = SELF_TEST_STATUS_PASSED;
-            }
-            else
-            {
-                result = SELF_TEST_STATUS_FAILED;
-                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_POST_TEST_FAILED, (U32)fpgaHeader.fpgaRevMajor, (U32)fpgaHeader.fpgaRev )
-            }
+            result = SELF_TEST_STATUS_FAILED;
+            SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_POST_TEST_FAILED, (U32)HD_FPGA_COMPATIBILITY_REV, (U32)fpgaSensorReadings.fpgaCompatibilityRev )
         }
     }
     else
@@ -975,11 +972,14 @@
     U32 const diffFPGATimerCount = (U32)u16DiffWithWrap( currentFPGATimerCount_ms, newFPGATimerCount_ms );
     U32 const diffTimerCount = u32DiffWithWrap( currentTimerCount_ms, newTimerCount_ms );
 
-    if ( getCurrentOperationMode() > MODE_INIT )
+    if ( getCurrentOperationMode() != MODE_INIT )
     {
         if ( abs( diffFPGATimerCount - diffTimerCount ) > PROCESSOR_FPGA_CLOCK_DIFF_TOLERANCE )
         {
-            SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_CLOCK_SPEED_CHECK_FAILURE, diffFPGATimerCount, diffTimerCount );
+            if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_CLOCK_SPEED_ERROR ) )
+            {
+                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_CLOCK_SPEED_CHECK_FAILURE, diffFPGATimerCount, diffTimerCount );
+            }
         }
     }
 
@@ -1987,21 +1987,6 @@
 
 /*********************************************************************//**
  * @brief
- * The FPGABloodLeakZeroDetected function returns TRUE if blood leak zeroing has
- * been detected and FALSE if no blood leak zeroing has been detected.
- * @details Inputs: fpgaSensorReadings
- * @details Outputs: none
- * @return FPGABloodLeakZeroDetected
- *************************************************************************/
-BOOL FPGABloodLeakZeroDetected( void )
-{
-    U16 FPGABloodLeakZeroDetected = fpgaSensorReadings.fpgaGPIO & FPGA_BLOOD_LEAK_ZERO_STATE_MASK;
-
-    return ( 0 == FPGABloodLeakZeroDetected ? FALSE : TRUE );
-}
-
-/*********************************************************************//**
- * @brief
  * The setFPGABloodLeakZero function sets the Blood Leak detector into
  * zeroing mode via the FPGA.
  * @details Inputs: none
@@ -2054,6 +2039,34 @@
 
 /*********************************************************************//**
  * @brief
+ * The getFPGABloodLeakZeroStatus function returns the blood leak sensor's
+ * zero status bit.
+ * @details Inputs: fpgaSensorReadings
+ * @details Outputs: none
+ * @return blood leak sensor zero status bit
+ *************************************************************************/
+U08 getFPGABloodLeakZeroStatus( void )
+{
+    U08 zeroStatus = (U08)( ( fpgaSensorReadings.fpgaGPIO & FPGA_BLOOD_LEAK_ZERO_STATE_MASK ) >> FPAG_BLOOD_LEAK_ZERO_BIT_INDEX );
+    return zeroStatus;
+}
+
+/*********************************************************************//**
+ * @brief
+ * The getFPGABloodLeakStatus function returns the blood leak sensor's
+ * blood detection status bit.
+ * @details Inputs: fpgaSensorReadings
+ * @details Outputs: none
+ * @return blood leak sensor self test status bit
+ *************************************************************************/
+U08 getFPGABloodLeakStatus( void )
+{
+    U08 selfTestStatus = (U08)( ( fpgaSensorReadings.fpgaGPIO & FPGA_BLOOD_LEAK_STATUS_MASK ) >> FPGA_BLOOD_LEAK_ST_BIT_INDEX );
+    return selfTestStatus;
+}
+
+/*********************************************************************//**
+ * @brief
  * The setFPGABloodLeakUARTControl function sets the blood leak sensor UART
  * control value.
  * @details Inputs: fpgaSensorReadings