Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -rd91a24c730aeb5cd7e3eba9ef4eca78e442911f8 -re5879a928e1ac6ed2e6960fd2f9a317ce166c699
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision d91a24c730aeb5cd7e3eba9ef4eca78e442911f8)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision e5879a928e1ac6ed2e6960fd2f9a317ce166c699)
@@ -78,6 +78,9 @@
 
 #define FPGA_ADC1_AUTO_READ_ENABLE      0x01                    ///< Auto-read enable bit for ADC1 control register.
 
+#define FPGA_AIRTRAP_LEVEL_LOW_MASK     0x0008                  ///< Bit mask for air trap lower level sensor.
+#define FPGA_AIRTRAP_LEVEL_HIGH_MASK    0x0004                  ///< Bit mask for air trap upper level sensor.
+
 // FPGA Sensors Record
 #pragma pack(push,1)
 /// Record structure for FPGA header read.
@@ -862,6 +865,26 @@
 
 /*********************************************************************//**
  * @brief
+ * The consumeUnexpectedData function checks to see if a byte is sitting in
+ * the SCI2 received data register.
+ * @details
+ * Inputs : fpgaHeader
+ * Outputs : none
+ * @return fpgaDiag
+ *************************************************************************/
+static void consumeUnexpectedData( void )
+{
+    // clear any errors
+    sciRxError( scilinREG );
+    // if a byte is pending read, read it
+    if ( sciIsRxReady( scilinREG ) != 0 )
+    {
+        sciReceiveByte( scilinREG );
+    }
+}
+
+/*********************************************************************//**
+ * @brief
  * The setupDMAForWriteCmd function sets the byte count for the next DMA
  * write command to the FPGA.
  * @details
@@ -1321,15 +1344,14 @@
  * Outputs : none
  * @return fpgaDiag
  *************************************************************************/
-static void consumeUnexpectedData( void )
+void getFPGAAirTrapLevels( BOOL *airAtLower, BOOL *airAtUpper )
 {
-    // clear any errors
-    sciRxError( scilinREG );
-    // if a byte is pending read, read it
-    if ( sciIsRxReady( scilinREG ) != 0 )
-    {
-        sciReceiveByte( scilinREG );
-    }
+    U16 fpgaGPIO = fpgaSensorReadings.fpgaGPIO;
+    U16 lower = fpgaGPIO & FPGA_AIRTRAP_LEVEL_LOW_MASK;
+    U16 upper = fpgaGPIO & FPGA_AIRTRAP_LEVEL_HIGH_MASK;
+
+    *airAtLower = ( 0 == lower ? FALSE : TRUE );
+    *airAtUpper = ( 0 == upper ? FALSE : TRUE );
 }
 
 /**@}*/