Index: firmware/include/system.h
===================================================================
diff -u -reff7b1575f008f81b29ef906f6346fac6012d3ab -r172b320a1007769c7452fe3f1cc7ac85b016f89a
--- firmware/include/system.h	(.../system.h)	(revision eff7b1575f008f81b29ef906f6346fac6012d3ab)
+++ firmware/include/system.h	(.../system.h)	(revision 172b320a1007769c7452fe3f1cc7ac85b016f89a)
@@ -115,7 +115,7 @@
 *
 *   PLL 1 clock source exported from HALCoGen GUI
 */
-#define PLL1_FREQ    206.67F
+#define PLL1_FREQ    208.00F
 
 /** @def LPO_LF_FREQ
 *   @brief LPO Low Freq Oscillator source exported from HALCoGen GUI
@@ -143,28 +143,28 @@
 *
 *   GCLK domain frequency exported from HALCoGen GUI
 */
-#define GCLK_FREQ    206.670F
+#define GCLK_FREQ    208.000F
 
 /** @def HCLK_FREQ
 *   @brief HCLK domain frequency exported from HALCoGen GUI
 *
 *   HCLK domain frequency exported from HALCoGen GUI
 */
-#define HCLK_FREQ    206.670F
+#define HCLK_FREQ    208.000F
 
 /** @def RTI_FREQ
 *   @brief RTI Clock frequency exported from HALCoGen GUI
 *
 *   RTI Clock frequency exported from HALCoGen GUI
 */
-#define RTI_FREQ     103.335F
+#define RTI_FREQ     104.000F
 
 /** @def AVCLK1_FREQ
 *   @brief AVCLK1 Domain frequency exported from HALCoGen GUI
 *
 *   AVCLK Domain frequency exported from HALCoGen GUI
 */
-#define AVCLK1_FREQ  103.335F
+#define AVCLK1_FREQ  104.000F
 
 /** @def AVCLK2_FREQ
 *   @brief AVCLK2 Domain frequency exported from HALCoGen GUI
@@ -178,42 +178,42 @@
 *
 *   AVCLK3 Domain frequency exported from HALCoGen GUI
 */
-#define AVCLK3_FREQ  103.335F
+#define AVCLK3_FREQ  104.000F
 
 /** @def AVCLK4_FREQ
 *   @brief AVCLK4 Domain frequency exported from HALCoGen GUI
 *
 *   AVCLK4 Domain frequency exported from HALCoGen GUI
 */
-#define AVCLK4_FREQ  103.335F
+#define AVCLK4_FREQ  104.000F
 
 /** @def VCLK1_FREQ
 *   @brief VCLK1 Domain frequency exported from HALCoGen GUI
 *
 *   VCLK1 Domain frequency exported from HALCoGen GUI
 */
-#define VCLK1_FREQ   103.335F
+#define VCLK1_FREQ   104.000F
 
 /** @def VCLK2_FREQ
 *   @brief VCLK2 Domain frequency exported from HALCoGen GUI
 *
 *   VCLK2 Domain frequency exported from HALCoGen GUI
 */
-#define VCLK2_FREQ   103.335F
+#define VCLK2_FREQ   104.000F
 
 /** @def VCLK3_FREQ
 *   @brief VCLK3 Domain frequency exported from HALCoGen GUI
 *
 *   VCLK3 Domain frequency exported from HALCoGen GUI
 */
-#define VCLK3_FREQ   103.335F
+#define VCLK3_FREQ   104.000F
 
 /** @def VCLK4_FREQ
 *   @brief VCLK4 Domain frequency exported from HALCoGen GUI
 *
 *   VCLK4 Domain frequency exported from HALCoGen GUI
 */
-#define VCLK4_FREQ   103.335F
+#define VCLK4_FREQ   104.000F
 
 
 /** @def SYS_PRE1
@@ -337,7 +337,7 @@
                                     | (uint32)((uint32)0x1FU << 24U) \
                                     | (uint32)0x00000000U \
                                     | (uint32)((uint32)(6U - 1U)<< 16U)\
-                                    | (uint32)(0x9A00U))
+                                    | (uint32)(0x9B00U))
                                     
 #define SYS_PLLCTL1_CONFIGVALUE_2   (((SYS_PLLCTL1_CONFIGVALUE_1) & 0xE0FFFFFFU) | (uint32)((uint32)(1U - 1U) << 24U))