Index: firmware/source/mibspi.c
===================================================================
diff -u -ra635fc9674913460c74831add7886c85d8aaf8f1 -rdfdd3cf20e2c41415a6b16d5b0c9dc53819b7399
--- firmware/source/mibspi.c	(.../mibspi.c)	(revision a635fc9674913460c74831add7886c85d8aaf8f1)
+++ firmware/source/mibspi.c	(.../mibspi.c)	(revision dfdd3cf20e2c41415a6b16d5b0c9dc53819b7399)
@@ -450,12 +450,12 @@
     mibspiREG3->INT0 = (mibspiREG3->INT0 & 0xFFFF0000U)
                      | (uint32)((uint32)0U << 9U)  /* TXINT */
                      | (uint32)((uint32)0U << 8U)  /* RXINT */
-                     | (uint32)((uint32)0U << 6U)  /* OVRNINT */
-                     | (uint32)((uint32)0U << 4U)  /* BITERR */
-                     | (uint32)((uint32)0U << 3U)  /* DESYNC */
+                     | (uint32)((uint32)1U << 6U)  /* OVRNINT */
+                     | (uint32)((uint32)1U << 4U)  /* BITERR */
+                     | (uint32)((uint32)1U << 3U)  /* DESYNC */
                      | (uint32)((uint32)0U << 2U)  /* PARERR */
-                     | (uint32)((uint32)0U << 1U)  /* TIMEOUT */
-                     | (uint32)((uint32)0U << 0U); /* DLENERR */
+                     | (uint32)((uint32)1U << 1U)  /* TIMEOUT */
+                     | (uint32)((uint32)1U << 0U); /* DLENERR */
 
     /** @b initialize @b MIBSPI3 @b Port */