Index: firmware/source/mibspi.c
===================================================================
diff -u -rdfdd3cf20e2c41415a6b16d5b0c9dc53819b7399 -rfe01fd0124c0c43737474781730608d55d0f0bda
--- firmware/source/mibspi.c	(.../mibspi.c)	(revision dfdd3cf20e2c41415a6b16d5b0c9dc53819b7399)
+++ firmware/source/mibspi.c	(.../mibspi.c)	(revision fe01fd0124c0c43737474781730608d55d0f0bda)
@@ -453,7 +453,7 @@
                      | (uint32)((uint32)1U << 6U)  /* OVRNINT */
                      | (uint32)((uint32)1U << 4U)  /* BITERR */
                      | (uint32)((uint32)1U << 3U)  /* DESYNC */
-                     | (uint32)((uint32)0U << 2U)  /* PARERR */
+                     | (uint32)((uint32)1U << 2U)  /* PARERR */
                      | (uint32)((uint32)1U << 1U)  /* TIMEOUT */
                      | (uint32)((uint32)1U << 0U); /* DLENERR */
 
@@ -528,7 +528,7 @@
                     | (uint32)((uint32)0U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)0U << 3U)  /* SCS[3] */
                     | (uint32)((uint32)0U << 4U)  /* SCS[4] */
-                    | (uint32)((uint32)0U << 5U)  /* SCS[5] */
+                    | (uint32)((uint32)1U << 5U)  /* SCS[5] */
                     | (uint32)((uint32)1U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO */
@@ -954,7 +954,7 @@
                     | (uint32)((uint32)1U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)1U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)1U << 3U)  /* SCS[3] */
-                    | (uint32)((uint32)0U << 8U)  /* ENA */
+                    | (uint32)((uint32)1U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO[0] */
                     | (uint32)((uint32)1U << 11U)  /* SOMI[0] */
@@ -986,7 +986,7 @@
                     | (uint32)((uint32)1U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)1U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)1U << 3U)  /* SCS[3] */
-                    | (uint32)((uint32)1U << 8U)  /* ENA */
+                    | (uint32)((uint32)0U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO[0] */
                     | (uint32)((uint32)1U << 11U)  /* SOMI[0] */
@@ -1018,7 +1018,7 @@
                     | (uint32)((uint32)0U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)0U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)0U << 3U)  /* SCS[3] */
-                    | (uint32)((uint32)1U << 8U)  /* ENA */
+                    | (uint32)((uint32)0U << 8U)  /* ENA */
                     | (uint32)((uint32)0U << 9U)  /* CLK */
                     | (uint32)((uint32)0U << 10U)  /* SIMO[0] */
                     | (uint32)((uint32)0U << 11U)  /* SOMI[0] */