Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r359f9350ad9b2156ce02c94fa4950c4fb6768572 -r22dba2a64a6d8251e909e6f964d74983486856a9
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 359f9350ad9b2156ce02c94fa4950c4fb6768572)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 22dba2a64a6d8251e909e6f964d74983486856a9)
@@ -977,7 +977,7 @@
     U32 const diffFPGATimerCount = (U32)u16DiffWithWrap( currentFPGATimerCount_ms, newFPGATimerCount_ms );
     U32 const diffTimerCount = u32DiffWithWrap( currentTimerCount_ms, newTimerCount_ms );
 
-    if ( getCurrentOperationMode() > MODE_INIT )
+    if ( getCurrentOperationMode() != MODE_INIT )
     {
         if ( abs( diffFPGATimerCount - diffTimerCount ) > PROCESSOR_FPGA_CLOCK_DIFF_TOLERANCE )
         {
Index: firmware/App/Services/SystemComm.c
===================================================================
diff -u -r359f9350ad9b2156ce02c94fa4950c4fb6768572 -r22dba2a64a6d8251e909e6f964d74983486856a9
--- firmware/App/Services/SystemComm.c	(.../SystemComm.c)	(revision 359f9350ad9b2156ce02c94fa4950c4fb6768572)
+++ firmware/App/Services/SystemComm.c	(.../SystemComm.c)	(revision 22dba2a64a6d8251e909e6f964d74983486856a9)
@@ -57,8 +57,10 @@
 #define MSG_NOT_ACKED_MAX_RETRIES       3       ///< Maximum number of times a message that requires ACK that was not ACK'd can be re-sent before alarm
 #define PENDING_ACK_LIST_SIZE           25      ///< Maximum number of Denali messages that can be pending ACK at any given time
 
-#define MAX_FPGA_CLOCK_SPEED_ERRORS             3                                     ///< maximum number of FPGA clock speed errors within window period before alarm - // DN-16SEPT2022
-#define MAX_FPGA_CLOCK_SPEED_ERROR_WINDOW_MS    (10 * SEC_PER_MIN * MS_PER_SECOND)    ///< FPGA clock speed error window - // DN-16SEPT2022
+#define MAX_FPGA_CLOCK_SPEED_ERRORS     1   //3       ///< maximum number of FPGA clock speed errors within window period before alarm - // Force 1 for testing ONLY. TODO: will use value 3.  DN-19SEPT2022
+//#define MAX_FPGA_CLOCK_SPEED_ERROR_WINDOW_MS    (10 * SEC_PER_MIN * MS_PER_SECOND)    ///< FPGA clock speed error window - // DN-16SEPT2022
+//#define MAX_FPGA_CLOCK_SPEED_ERROR_WINDOW_MS    (1 * SEC_PER_MIN * MS_PER_SECOND)    ///< FPGA clock speed error window - // For 1 minute for testing ONLY. DN-19SEPT2022
+#define MAX_FPGA_CLOCK_SPEED_ERROR_WINDOW_MS    (1 * MS_PER_SECOND)    ///< FPGA clock speed error window - // Force 1 second for testing ONLY. DN-19SEPT2022
 
 #pragma pack(push, 1)
 
Index: firmware/App/Tasks/TaskPriority.c
===================================================================
diff -u -r359f9350ad9b2156ce02c94fa4950c4fb6768572 -r22dba2a64a6d8251e909e6f964d74983486856a9
--- firmware/App/Tasks/TaskPriority.c	(.../TaskPriority.c)	(revision 359f9350ad9b2156ce02c94fa4950c4fb6768572)
+++ firmware/App/Tasks/TaskPriority.c	(.../TaskPriority.c)	(revision 22dba2a64a6d8251e909e6f964d74983486856a9)
@@ -65,7 +65,7 @@
 
 #ifndef BOARD_WITH_NO_HARDWARE
         // Verify processor clock speed against FPGA clock
-        //execFPGAClockSpeedTest(); TODO - uncomment it DN-16SEPT2022
+        //execFPGAClockSpeedTest(); //TODO - uncomment it DN-19SEPT2022
 
 #ifndef CAN_TEST
         // Monitor and process buttons