Index: firmware/App/Controllers/BloodFlow.c =================================================================== diff -u -ref0b3f0ec00fadc50f95e0db1a6477fb4b076ea1 -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/App/Controllers/BloodFlow.c (.../BloodFlow.c) (revision ef0b3f0ec00fadc50f95e0db1a6477fb4b076ea1) +++ firmware/App/Controllers/BloodFlow.c (.../BloodFlow.c) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -38,7 +38,7 @@ #define MAX_BLOOD_FLOW_RATE 500 // mL/min #define MIN_BLOOD_FLOW_RATE 100 // mL/min -#define MAX_BLOOD_PUMP_PWM_STEP_CHANGE 0.02 // duty cycle TODO - fixed or parameterized or set in motor controller? +#define MAX_BLOOD_PUMP_PWM_STEP_CHANGE 0.005 // max duty cycle change when ramping #define MAX_BLOOD_PUMP_PWM_DUTY_CYCLE 0.88 // controller will error if PWM duty cycle > 90%, so set max to 88% #define MIN_BLOOD_PUMP_PWM_DUTY_CYCLE 0.12 // controller will error if PWM duty cycle < 10%, so set min to 12% @@ -47,7 +47,7 @@ #define BP_I_COEFFICIENT 0.00002 // I term for blood pump control #define BP_MAX_ERROR_SUM 10.0 // for anti-wind-up in I term #define BP_MIN_ERROR_SUM -10.0 -#define BP_MAX_PWM_DC_DELTA 0.01 // prevents large steps in PWM duty cycle +#define BP_MAX_PWM_DC_DELTA 0.01 // prevents large steps in PWM duty cycle while controlling #define BP_MIN_PWM_DC_DELTA -0.01 #define BP_MAX_CURR_WHEN_STOPPED_MA 150.0 // motor controller current should not exceed this when pump should be stopped @@ -61,7 +61,7 @@ #define BP_REV_PER_LITER 124.0 // rotor revolutions per liter #define BP_ML_PER_MIN_TO_PUMP_RPM_FACTOR ( BP_REV_PER_LITER / ML_PER_LITER ) #define BP_GEAR_RATIO 32.0 // blood pump motor to blood pump gear ratio -#define BP_MOTOR_RPM_TO_PWM_DC_FACTOR 0.0003717 // ~27 BP motor RPM = 1% PWM duty cycle +#define BP_MOTOR_RPM_TO_PWM_DC_FACTOR 0.000369 //717 // ~27 BP motor RPM = 1% PWM duty cycle #define BP_PWM_ZERO_OFFSET 0.1 // 10% PWM duty cycle = zero speed #define BP_PWM_FROM_ML_PER_MIN(rate) ( (rate) * BP_ML_PER_MIN_TO_PUMP_RPM_FACTOR * BP_GEAR_RATIO * BP_MOTOR_RPM_TO_PWM_DC_FACTOR + BP_PWM_ZERO_OFFSET ) @@ -90,7 +90,7 @@ NUM_OF_BLOOD_FLOW_SELF_TEST_STATES } BLOOD_FLOW_SELF_TEST_STATE_T; -// CAN3 port pin assignments for pump stop and direction outputs +// pin assignments for pump stop and direction outputs #define STOP_CAN3_PORT_MASK 0x00000002 // (Tx - re-purposed as output GPIO for blood pump stop signal) #define DIR_CAN3_PORT_MASK 0x00000002 // (Rx - re-purposed as output GPIO for blood pump direction signal) // blood pump stop and direction macros @@ -339,7 +339,7 @@ if ( getTargetBloodFlowRate() != 0 ) { // set initial PWM duty cycle - bloodPumpPWMDutyCyclePctSet = MAX_BLOOD_PUMP_PWM_STEP_CHANGE; + bloodPumpPWMDutyCyclePctSet = BP_PWM_ZERO_OFFSET + MAX_BLOOD_PUMP_PWM_STEP_CHANGE; etpwmSetCmpA( etpwmREG1, (U32)FLOAT_TO_INT_WITH_ROUND( bloodPumpPWMDutyCyclePctSet * (F32)(etpwmREG1->TBPRD) ) ); // allow blood pump to run in requested direction setBloodPumpDirection( bloodPumpDirection ); Index: firmware/App/Controllers/DialInFlow.c =================================================================== diff -u -r96bff7c1a8c755eb28a89e131a737dc1c4a7d9fc -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/App/Controllers/DialInFlow.c (.../DialInFlow.c) (revision 96bff7c1a8c755eb28a89e131a737dc1c4a7d9fc) +++ firmware/App/Controllers/DialInFlow.c (.../DialInFlow.c) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -18,8 +18,9 @@ #include #endif -#include "can.h" #include "etpwm.h" +#include "gio.h" +#include "mibspi.h" #include "Common.h" #include "FPGA.h" @@ -90,14 +91,14 @@ NUM_OF_DIAL_IN_FLOW_SELF_TEST_STATES } DIAL_IN_FLOW_SELF_TEST_STATE_T; -// CAN3 port pin assignments for pump stop and direction outputs -#define STOP_CAN3_PORT_MASK 0x00000002 // (Tx - re-purposed as output GPIO for dialIn pump stop signal) -#define DIR_CAN3_PORT_MASK 0x00000002 // (Rx - re-purposed as output GPIO for dialIn pump direction signal) +// pin assignments for pump stop and direction outputs +#define STOP_DI_PUMP_GIO_PORT_PIN 2U +#define DIR_DI_PUMP_SPI5_PORT_MASK 0x00000100 // (ENA - re-purposed as output GPIO) // dialIn pump stop and direction macros -#define SET_DIP_DIR() {canREG3->RIOC |= DIR_CAN3_PORT_MASK;} -#define SET_DIP_STOP() {canREG3->TIOC |= STOP_CAN3_PORT_MASK;} -#define CLR_DIP_DIR() {canREG3->RIOC &= ~DIR_CAN3_PORT_MASK;} -#define CLR_DIP_STOP() {canREG3->TIOC &= ~STOP_CAN3_PORT_MASK;} +#define SET_DIP_DIR() {mibspiREG5->PC3 |= DIR_DI_PUMP_SPI5_PORT_MASK;} +#define SET_DIP_STOP() gioSetBit( gioPORTA, STOP_DI_PUMP_GIO_PORT_PIN, PIN_SIGNAL_HIGH ) +#define CLR_DIP_DIR() {mibspiREG5->PC3 &= ~DIR_DI_PUMP_SPI5_PORT_MASK;} +#define CLR_DIP_STOP() gioSetBit( gioPORTA, STOP_DI_PUMP_GIO_PORT_PIN, PIN_SIGNAL_LOW ) // ********** private data ********** Index: firmware/App/Controllers/DialOutUF.c =================================================================== diff -u -r96bff7c1a8c755eb28a89e131a737dc1c4a7d9fc -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/App/Controllers/DialOutUF.c (.../DialOutUF.c) (revision 96bff7c1a8c755eb28a89e131a737dc1c4a7d9fc) +++ firmware/App/Controllers/DialOutUF.c (.../DialOutUF.c) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -18,8 +18,9 @@ #include #endif -#include "can.h" #include "etpwm.h" +#include "gio.h" +#include "spi.h" #include "Common.h" #include "FPGA.h" @@ -91,13 +92,13 @@ } DIAL_OUT_FLOW_SELF_TEST_STATE_T; // CAN3 port pin assignments for pump stop and direction outputs -#define STOP_CAN3_PORT_MASK 0x00000002 // (Tx - re-purposed as output GPIO for dialOut pump stop signal) -#define DIR_CAN3_PORT_MASK 0x00000002 // (Rx - re-purposed as output GPIO for dialOut pump direction signal) +#define STOP_SPI4_PORT_MASK 0x00000200 // (CLK - re-purposed as output GPIO) +#define DIR_DO_PUMP_GIO_PORT_PIN 6U // dialOut pump stop and direction macros -#define SET_DOP_DIR() {canREG3->RIOC |= DIR_CAN3_PORT_MASK;} -#define SET_DOP_STOP() {canREG3->TIOC |= STOP_CAN3_PORT_MASK;} -#define CLR_DOP_DIR() {canREG3->RIOC &= ~DIR_CAN3_PORT_MASK;} -#define CLR_DOP_STOP() {canREG3->TIOC &= ~STOP_CAN3_PORT_MASK;} +#define SET_DOP_DIR() gioSetBit( gioPORTA, DIR_DO_PUMP_GIO_PORT_PIN, PIN_SIGNAL_HIGH ) +#define SET_DOP_STOP() {spiREG4->PC3 |= STOP_SPI4_PORT_MASK;} +#define CLR_DOP_DIR() gioSetBit( gioPORTA, DIR_DO_PUMP_GIO_PORT_PIN, PIN_SIGNAL_LOW ) +#define CLR_DOP_STOP() {spiREG4->PC3 &= ~STOP_SPI4_PORT_MASK;} // ********** private data ********** Index: firmware/App/Services/SystemComm.c =================================================================== diff -u -ref0b3f0ec00fadc50f95e0db1a6477fb4b076ea1 -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/App/Services/SystemComm.c (.../SystemComm.c) (revision ef0b3f0ec00fadc50f95e0db1a6477fb4b076ea1) +++ firmware/App/Services/SystemComm.c (.../SystemComm.c) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -76,6 +76,9 @@ static BOOL uiIsCommunicating = FALSE; // has UI sent a message since last check static BOOL uiDidCommunicate = FALSE; // has UI every sent a message +static U32 sentCANPacketsCount = 0; +static U32 compCANPacketsCount = 0; + // ********** private function prototypes ********** static void initUARTAndDMA( void ); @@ -250,8 +253,10 @@ // message interrupt is for a transmit message box? if ( TRUE == isCANBoxForXmit( srcCANBox ) ) { - U32 bytesXmitted = transmitNextCANPacket(); + U32 bytesXmitted; + compCANPacketsCount++; + bytesXmitted = transmitNextCANPacket(); if ( 0 == bytesXmitted ) { signalCANXmitsCompleted(); @@ -500,6 +505,10 @@ // TODO - shouldn't get here, but let's see if we do SET_ALARM_WITH_1_U32_DATA( ALARM_ID_SOFTWARE_FAULT, (U32)mBox ) } + else + { + sentCANPacketsCount++; + } result = CAN_MESSAGE_PAYLOAD_SIZE; } else Index: firmware/App/Tasks/TaskGeneral.c =================================================================== diff -u -r941afbaab7fc86f40fa49f9d110d481f65b44b68 -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/App/Tasks/TaskGeneral.c (.../TaskGeneral.c) (revision 941afbaab7fc86f40fa49f9d110d481f65b44b68) +++ firmware/App/Tasks/TaskGeneral.c (.../TaskGeneral.c) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -19,6 +19,8 @@ #include "Common.h" #include "AlarmLamp.h" #include "BloodFlow.h" +#include "DialInFlow.h" +#include "DialOutUF.h" #include "OperationModes.h" #include "SystemComm.h" #include "WatchdogMgmt.h" @@ -54,12 +56,18 @@ // prevent most processing until UI has started communicating if ( TRUE == uiCommunicated() ) { + // run operation mode state machine + execOperationModes(); + // control blood pump execBloodFlowController(); - // run operation mode state machine - execOperationModes(); + // control dialysate inlet pump + execDialInFlowController(); + // control dialysate outlet pump + execDialOutUFController(); + // manage alarm state execAlarmMgmt(); Index: firmware/App/Tasks/TaskPriority.c =================================================================== diff -u -r941afbaab7fc86f40fa49f9d110d481f65b44b68 -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/App/Tasks/TaskPriority.c (.../TaskPriority.c) (revision 941afbaab7fc86f40fa49f9d110d481f65b44b68) +++ firmware/App/Tasks/TaskPriority.c (.../TaskPriority.c) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -19,6 +19,8 @@ #include "InternalADC.h" #include "BloodFlow.h" #include "Buttons.h" +#include "DialInFlow.h" +#include "DialOutUF.h" #include "FPGA.h" #include "SystemComm.h" #include "WatchdogMgmt.h" @@ -49,6 +51,12 @@ // monitor blood pump and flow execBloodFlowMonitor(); + // monitor dialysate inlet pump and flow + execDialInFlowMonitor(); + + // monitor dialysate outlet pump and reservoir load cells + execDialOutUFMonitor(); + // 2nd pass for FPGA execFPGAOut(); Index: firmware/HD.dil =================================================================== diff -u -ref0b3f0ec00fadc50f95e0db1a6477fb4b076ea1 -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/HD.dil (.../HD.dil) (revision ef0b3f0ec00fadc50f95e0db1a6477fb4b076ea1) +++ firmware/HD.dil (.../HD.dil) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -1,4 +1,4 @@ -# RM46L852PGE 12/16/19 16:40:38 +# RM46L852PGE 12/17/19 11:10:24 # ARCH=RM46L852PGE # @@ -263,7 +263,7 @@ DRIVER.SYSTEM.VAR.VIM_CHANNEL_10_INT_ENABLE.VALUE=0 DRIVER.SYSTEM.VAR.SAFETY_INIT_CAN5_DP_PBISTCHECK_ENA.VALUE=0x00000000 DRIVER.SYSTEM.VAR.SCILIN_ENABLE.VALUE=0 -DRIVER.SYSTEM.VAR.SPI_ENABLE.VALUE=0 +DRIVER.SYSTEM.VAR.SPI_ENABLE.VALUE=1 DRIVER.SYSTEM.VAR.ALL_DVR_ENA.VALUE=0 DRIVER.SYSTEM.VAR.CCM_MENU_VALUE.VALUE=0x0001 DRIVER.SYSTEM.VAR.PBIST_ENA1.VALUE=1 @@ -566,7 +566,7 @@ DRIVER.SYSTEM.VAR.VIM_CHANNEL_101_INT_PRAGMA_ENABLE.VALUE=0 DRIVER.SYSTEM.VAR.VIM_CHANNEL_4_INT_TYPE.VALUE=IRQ DRIVER.SYSTEM.VAR.VIM_CHANNEL_1_INT_ENABLE.VALUE=1 -DRIVER.SYSTEM.VAR.SPI4_ENABLE.VALUE=0 +DRIVER.SYSTEM.VAR.SPI4_ENABLE.VALUE=1 DRIVER.SYSTEM.VAR.CLKT_AVCLK4_POST_SOURCE.VALUE=VCLKA4_DIVR DRIVER.SYSTEM.VAR.CLKT_VCLK1_FREQ.VALUE=103.335 DRIVER.SYSTEM.VAR.CLKT_AVCLK3_FREQ1.VALUE=103.335 Index: firmware/include/spi.h =================================================================== diff -u -reff7b1575f008f81b29ef906f6346fac6012d3ab -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/include/spi.h (.../spi.h) (revision eff7b1575f008f81b29ef906f6346fac6012d3ab) +++ firmware/include/spi.h (.../spi.h) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -157,9 +157,26 @@ +#define SPI4_GCR1_CONFIGVALUE (0x01000000U | (uint32)((uint32)1U << 1U) | 1U) +#define SPI4_INT0_CONFIGVALUE ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 0U)) +#define SPI4_LVL_CONFIGVALUE ((uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 0U)) +#define SPI4_PC0_CONFIGVALUE ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U)) +#define SPI4_PC1_CONFIGVALUE ((uint32)((uint32)1U << 0U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U)) +#define SPI4_PC6_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U)) +#define SPI4_PC7_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U)) +#define SPI4_PC8_CONFIGVALUE ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U)) +#define SPI4_DELAY_CONFIGVALUE ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 0U)) + +#define SPI4_FMT0_CONFIGVALUE ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 23U) | (uint32)((uint32)0U << 22U) | (uint32)((uint32)0U << 21U) | (uint32)((uint32)0U << 20U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)102U << 8U) | (uint32)((uint32)16U << 0U)) +#define SPI4_FMT1_CONFIGVALUE ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 23U) | (uint32)((uint32)0U << 22U) | (uint32)((uint32)0U << 21U) | (uint32)((uint32)0U << 20U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)102U << 8U) | (uint32)((uint32)16U << 0U)) +#define SPI4_FMT2_CONFIGVALUE ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 23U) | (uint32)((uint32)0U << 22U) | (uint32)((uint32)0U << 21U) | (uint32)((uint32)0U << 20U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)102U << 8U) | (uint32)((uint32)16U << 0U)) +#define SPI4_FMT3_CONFIGVALUE ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 23U) | (uint32)((uint32)0U << 22U) | (uint32)((uint32)0U << 21U) | (uint32)((uint32)0U << 20U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)102U << 8U) | (uint32)((uint32)16U << 0U)) + + + /** * @defgroup SPI SPI * @brief Serial Peripheral Interface Module. @@ -190,6 +207,7 @@ void spiDisableLoopback(spiBASE_t *spi); SpiDataStatus_t SpiTxStatus(spiBASE_t *spi); SpiDataStatus_t SpiRxStatus(spiBASE_t *spi); +void spi4GetConfigValue(spi_config_reg_t *config_reg, config_value_type_t type); /** @fn void spiNotification(spiBASE_t *spi, uint32 flags) * @brief Interrupt callback Index: firmware/source/notification.c =================================================================== diff -u -r40bcef6aa65af6c93ce937c6c4aa2de13e8a78d3 -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/source/notification.c (.../notification.c) (revision 40bcef6aa65af6c93ce937c6c4aa2de13e8a78d3) +++ firmware/source/notification.c (.../notification.c) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -55,6 +55,7 @@ #include "gio.h" #include "mibspi.h" #include "sci.h" +#include "spi.h" #include "rti.h" #include "etpwm.h" #include "sys_dma.h" @@ -187,9 +188,29 @@ /* USER CODE BEGIN (30) */ /* USER CODE END */ +#pragma WEAK(spiNotification) +void spiNotification(spiBASE_t *spi, uint32 flags) +{ +/* enter user code between the USER CODE BEGIN and USER CODE END. */ +/* USER CODE BEGIN (31) */ +/* USER CODE END */ +} +/* USER CODE BEGIN (32) */ +/* USER CODE END */ +#pragma WEAK(spiEndNotification) +void spiEndNotification(spiBASE_t *spi) +{ +/* enter user code between the USER CODE BEGIN and USER CODE END. */ +/* USER CODE BEGIN (33) */ +/* USER CODE END */ +} +/* USER CODE BEGIN (34) */ +/* USER CODE END */ + + /* USER CODE BEGIN (43) */ /* USER CODE END */ Index: firmware/source/spi.c =================================================================== diff -u --- firmware/source/spi.c (revision 0) +++ firmware/source/spi.c (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -0,0 +1,746 @@ +/** @file spi.c +* @brief SPI Driver Implementation File +* @date 11-Dec-2018 +* @version 04.07.01 +*/ + +/* +* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com +* +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions +* are met: +* +* Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the +* distribution. +* +* Neither the name of Texas Instruments Incorporated nor the names of +* its contributors may be used to endorse or promote products derived +* from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +*/ + +/* USER CODE BEGIN (0) */ +/* USER CODE END */ + +#include "spi.h" +#include "sys_vim.h" +/* USER CODE BEGIN (1) */ +/* USER CODE END */ + +/** @struct g_spiPacket +* @brief globals +* +*/ +static volatile struct g_spiPacket +{ + spiDAT1_t g_spiDataFormat; + uint32 tx_length; + uint32 rx_length; + uint16 * txdata_ptr; + uint16 * rxdata_ptr; + SpiDataStatus_t tx_data_status; + SpiDataStatus_t rx_data_status; +} g_spiPacket_t[5U]; + +/** @fn void spiInit(void) +* @brief Initializes the SPI Driver +* +* This function initializes the SPI module. +*/ +/* SourceId : SPI_SourceId_001 */ +/* DesignId : SPI_DesignId_001 */ +/* Requirements : HL_SR126 */ +void spiInit(void) +{ +/* USER CODE BEGIN (2) */ +/* USER CODE END */ + + + + + + + /** @b initialize @b SPI4 */ + + /** bring SPI out of reset */ + spiREG4->GCR0 = 0U; + spiREG4->GCR0 = 1U; + + /** SPI4 master mode and clock configuration */ + spiREG4->GCR1 = (spiREG4->GCR1 & 0xFFFFFFFCU) | ((uint32)((uint32)1U << 1U) /* CLOKMOD */ + | 1U); /* MASTER */ + + /** SPI4 enable pin configuration */ + spiREG4->INT0 = (spiREG4->INT0 & 0xFEFFFFFFU) | (uint32)((uint32)0U << 24U); /* ENABLE HIGHZ */ + + /** - Delays */ + spiREG4->DELAY = (uint32)((uint32)0U << 24U) /* C2TDELAY */ + | (uint32)((uint32)0U << 16U) /* T2CDELAY */ + | (uint32)((uint32)0U << 8U) /* T2EDELAY */ + | (uint32)((uint32)0U << 0U); /* C2EDELAY */ + + /** - Data Format 0 */ + spiREG4->FMT0 = (uint32)((uint32)0U << 24U) /* wdelay */ + | (uint32)((uint32)0U << 23U) /* parity Polarity */ + | (uint32)((uint32)0U << 22U) /* parity enable */ + | (uint32)((uint32)0U << 21U) /* wait on enable */ + | (uint32)((uint32)0U << 20U) /* shift direction */ + | (uint32)((uint32)0U << 17U) /* clock polarity */ + | (uint32)((uint32)0U << 16U) /* clock phase */ + | (uint32)((uint32)102U << 8U) /* baudrate prescale */ + | (uint32)((uint32)16U << 0U); /* data word length */ + + /** - Data Format 1 */ + spiREG4->FMT1 = (uint32)((uint32)0U << 24U) /* wdelay */ + | (uint32)((uint32)0U << 23U) /* parity Polarity */ + | (uint32)((uint32)0U << 22U) /* parity enable */ + | (uint32)((uint32)0U << 21U) /* wait on enable */ + | (uint32)((uint32)0U << 20U) /* shift direction */ + | (uint32)((uint32)0U << 17U) /* clock polarity */ + | (uint32)((uint32)0U << 16U) /* clock phase */ + | (uint32)((uint32)102U << 8U) /* baudrate prescale */ + | (uint32)((uint32)16U << 0U); /* data word length */ + + /** - Data Format 2 */ + spiREG4->FMT2 = (uint32)((uint32)0U << 24U) /* wdelay */ + | (uint32)((uint32)0U << 23U) /* parity Polarity */ + | (uint32)((uint32)0U << 22U) /* parity enable */ + | (uint32)((uint32)0U << 21U) /* wait on enable */ + | (uint32)((uint32)0U << 20U) /* shift direction */ + | (uint32)((uint32)0U << 17U) /* clock polarity */ + | (uint32)((uint32)0U << 16U) /* clock phase */ + | (uint32)((uint32)102U << 8U) /* baudrate prescale */ + | (uint32)((uint32)16U << 0U); /* data word length */ + + /** - Data Format 3 */ + spiREG4->FMT3 = (uint32)((uint32)0U << 24U) /* wdelay */ + | (uint32)((uint32)0U << 23U) /* parity Polarity */ + | (uint32)((uint32)0U << 22U) /* parity enable */ + | (uint32)((uint32)0U << 21U) /* wait on enable */ + | (uint32)((uint32)0U << 20U) /* shift direction */ + | (uint32)((uint32)0U << 17U) /* clock polarity */ + | (uint32)((uint32)0U << 16U) /* clock phase */ + | (uint32)((uint32)102U << 8U) /* baudrate prescale */ + | (uint32)((uint32)16U << 0U); /* data word length */ + + /** - set interrupt levels */ + spiREG4->LVL = (uint32)((uint32)0U << 9U) /* TXINT */ + | (uint32)((uint32)0U << 8U) /* RXINT */ + | (uint32)((uint32)0U << 6U) /* OVRNINT */ + | (uint32)((uint32)0U << 4U) /* BITERR */ + | (uint32)((uint32)0U << 3U) /* DESYNC */ + | (uint32)((uint32)0U << 2U) /* PARERR */ + | (uint32)((uint32)0U << 1U) /* TIMEOUT */ + | (uint32)((uint32)0U << 0U); /* DLENERR */ + + /** - clear any pending interrupts */ + spiREG4->FLG |= 0xFFFFU; + + /** - enable interrupts */ + spiREG4->INT0 = (spiREG4->INT0 & 0xFFFF0000U) + | (uint32)((uint32)0U << 9U) /* TXINT */ + | (uint32)((uint32)0U << 8U) /* RXINT */ + | (uint32)((uint32)0U << 6U) /* OVRNINT */ + | (uint32)((uint32)0U << 4U) /* BITERR */ + | (uint32)((uint32)0U << 3U) /* DESYNC */ + | (uint32)((uint32)0U << 2U) /* PARERR */ + | (uint32)((uint32)0U << 1U) /* TIMEOUT */ + | (uint32)((uint32)0U << 0U); /* DLENERR */ + + /** @b initialize @b SPI4 @b Port */ + + /** - SPI4 Port output values */ + spiREG4->PC3 = (uint32)((uint32)1U << 0U) /* SCS[0] */ + | (uint32)((uint32)0U << 8U) /* ENA */ + | (uint32)((uint32)1U << 9U) /* CLK */ + | (uint32)((uint32)0U << 10U) /* SIMO */ + | (uint32)((uint32)0U << 11U); /* SOMI */ + + /** - SPI4 Port direction */ + spiREG4->PC1 = (uint32)((uint32)1U << 0U) /* SCS[0] */ + | (uint32)((uint32)0U << 8U) /* ENA */ + | (uint32)((uint32)1U << 9U) /* CLK */ + | (uint32)((uint32)1U << 10U) /* SIMO */ + | (uint32)((uint32)0U << 11U); /* SOMI */ + + /** - SPI4 Port open drain enable */ + spiREG4->PC6 = (uint32)((uint32)0U << 0U) /* SCS[0] */ + | (uint32)((uint32)0U << 8U) /* ENA */ + | (uint32)((uint32)0U << 9U) /* CLK */ + | (uint32)((uint32)0U << 10U) /* SIMO */ + | (uint32)((uint32)0U << 11U); /* SOMI */ + + /** - SPI4 Port pullup / pulldown selection */ + spiREG4->PC8 = (uint32)((uint32)1U << 0U) /* SCS[0] */ + | (uint32)((uint32)1U << 8U) /* ENA */ + | (uint32)((uint32)1U << 9U) /* CLK */ + | (uint32)((uint32)1U << 10U) /* SIMO */ + | (uint32)((uint32)1U << 11U); /* SOMI */ + + /** - SPI4 Port pullup / pulldown enable*/ + spiREG4->PC7 = (uint32)((uint32)0U << 0U) /* SCS[0] */ + | (uint32)((uint32)0U << 8U) /* ENA */ + | (uint32)((uint32)0U << 9U) /* CLK */ + | (uint32)((uint32)0U << 10U) /* SIMO */ + | (uint32)((uint32)0U << 11U); /* SOMI */ + + /* SPI4 set all pins to functional */ + spiREG4->PC0 = (uint32)((uint32)1U << 0U) /* SCS[0] */ + | (uint32)((uint32)1U << 8U) /* ENA */ + | (uint32)((uint32)0U << 9U) /* CLK */ + | (uint32)((uint32)1U << 10U) /* SIMO */ + | (uint32)((uint32)1U << 11U); /* SOMI */ + + /** - Initialize TX and RX data buffer Status */ + g_spiPacket_t[3U].tx_data_status = SPI_READY; + g_spiPacket_t[3U].rx_data_status = SPI_READY; + + /** - Finally start SPI4 */ + spiREG4->GCR1 = (spiREG4->GCR1 & 0xFEFFFFFFU) | 0x01000000U; + + +/* USER CODE BEGIN (3) */ +/* USER CODE END */ +} + + +/** @fn void spiSetFunctional(spiBASE_t *spi, uint32 port) +* @brief Change functional behavior of pins at runtime. +* @param[in] spi - Spi module base address +* @param[in] port - Value to write to PC0 register +* +* Change the value of the PC0 register at runtime, this allows to +* dynamically change the functionality of the SPI pins between functional +* and GIO mode. +*/ +/* SourceId : SPI_SourceId_002 */ +/* DesignId : SPI_DesignId_002 */ +/* Requirements : HL_SR128 */ +void spiSetFunctional(spiBASE_t *spi, uint32 port) +{ +/* USER CODE BEGIN (4) */ +/* USER CODE END */ + + spi->PC0 = port; + +/* USER CODE BEGIN (5) */ +/* USER CODE END */ +} + + +/** @fn uint32 spiReceiveData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * destbuff) +* @brief Receives Data using polling method +* @param[in] spi - Spi module base address +* @param[in] dataconfig_t - Spi DAT1 register configuration +* @param[in] blocksize - number of data +* @param[in] destbuff - Pointer to the destination data (16 bit). +* +* @return flag register value. +* +* This function transmits blocksize number of data from source buffer using polling method. +*/ +/* SourceId : SPI_SourceId_003 */ +/* DesignId : SPI_DesignId_007 */ +/* Requirements : HL_SR133 */ +uint32 spiReceiveData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * destbuff) +{ +/* USER CODE BEGIN (6) */ +/* USER CODE END */ + uint32 Chip_Select_Hold = (dataconfig_t->CS_HOLD) ? 0x10000000U : 0U; + uint32 WDelay = (dataconfig_t->WDEL) ? 0x04000000U : 0U; + SPIDATAFMT_t DataFormat = dataconfig_t->DFSEL; + uint8 ChipSelect = dataconfig_t->CSNR; + + while(blocksize != 0U) + { + if((spi->FLG & 0x000000FFU) !=0U) + { + break; + } + if(blocksize == 1U) + { + Chip_Select_Hold = 0U; + } + + /*SAFETYMCUSW 51 S MR:12.3 "Needs shifting for 32-bit value" */ + spi->DAT1 = ((uint32)DataFormat << 24U) | + ((uint32)ChipSelect << 16U) | + (WDelay) | + (Chip_Select_Hold) | + (0x00000000U); + /*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */ + while((spi->FLG & 0x00000100U) != 0x00000100U) + { + } /* Wait */ + /*SAFETYMCUSW 45 D MR:21.1 "Valid non NULL input parameters are only allowed in this driver" */ + *destbuff = (uint16)spi->BUF; + /*SAFETYMCUSW 567 S MR:17.1,17.4 "Pointer increment needed" */ + destbuff++; + blocksize--; + } + +/* USER CODE BEGIN (7) */ +/* USER CODE END */ + + return (spi->FLG & 0xFFU); +} + + +/** @fn uint32 spiGetData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * destbuff) +* @brief Receives Data using interrupt method +* @param[in] spi - Spi module base address +* @param[in] dataconfig_t - Spi DAT1 register configuration +* @param[in] blocksize - number of data +* @param[in] destbuff - Pointer to the destination data (16 bit). +* +* @return flag register value. +* +* This function transmits blocksize number of data from source buffer using interrupt method. +*/ +/* SourceId : SPI_SourceId_004 */ +/* DesignId : SPI_DesignId_008 */ +/* Requirements : HL_SR134 */ +void spiGetData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * destbuff) +{ + uint32 index = (spi == spiREG1) ? 0U :((spi==spiREG2) ? 1U : ((spi==spiREG3) ? 2U:((spi==spiREG4) ? 3U:4U))); + +/* USER CODE BEGIN (8) */ +/* USER CODE END */ + + g_spiPacket_t[index].rx_length = blocksize; + g_spiPacket_t[index].rxdata_ptr = destbuff; + g_spiPacket_t[index].g_spiDataFormat = *dataconfig_t; + g_spiPacket_t[index].rx_data_status = SPI_PENDING; + + spi->INT0 |= 0x0100U; + +/* USER CODE BEGIN (9) */ +/* USER CODE END */ +} + + +/** @fn uint32 spiTransmitData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff) +* @brief Transmits Data using polling method +* @param[in] spi - Spi module base address +* @param[in] dataconfig_t - Spi DAT1 register configuration +* @param[in] blocksize - number of data +* @param[in] srcbuff - Pointer to the source data ( 16 bit). +* +* @return flag register value. +* +* This function transmits blocksize number of data from source buffer using polling method. +*/ +/* SourceId : SPI_SourceId_005 */ +/* DesignId : SPI_DesignId_005 */ +/* Requirements : HL_SR131 */ +uint32 spiTransmitData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff) +{ + volatile uint32 SpiBuf; + uint16 Tx_Data; + uint32 Chip_Select_Hold = (dataconfig_t->CS_HOLD) ? 0x10000000U : 0U; + uint32 WDelay = (dataconfig_t->WDEL) ? 0x04000000U : 0U; + SPIDATAFMT_t DataFormat = dataconfig_t->DFSEL; + uint8 ChipSelect = dataconfig_t->CSNR; + +/* USER CODE BEGIN (10) */ +/* USER CODE END */ + while(blocksize != 0U) + { + if((spi->FLG & 0x000000FFU) !=0U) + { + break; + } + + if(blocksize == 1U) + { + Chip_Select_Hold = 0U; + } + /*SAFETYMCUSW 45 D MR:21.1 "Valid non NULL input parameters are only allowed in this driver" */ + Tx_Data = *srcbuff; + + spi->DAT1 = ((uint32)DataFormat << 24U) | + ((uint32)ChipSelect << 16U) | + (WDelay) | + (Chip_Select_Hold) | + (uint32)Tx_Data; + /*SAFETYMCUSW 567 S MR:17.1,17.4 "Pointer increment needed" */ + srcbuff++; + /*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */ + while((spi->FLG & 0x00000100U) != 0x00000100U) + { + } /* Wait */ + SpiBuf = spi->BUF; + + blocksize--; + } + +/* USER CODE BEGIN (11) */ +/* USER CODE END */ + + return (spi->FLG & 0xFFU); +} + + +/** @fn void spiSendData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff) +* @brief Transmits Data using interrupt method +* @param[in] spi - Spi module base address +* @param[in] dataconfig_t - Spi DAT1 register configuration +* @param[in] blocksize - number of data +* @param[in] srcbuff - Pointer to the source data ( 16 bit). +* +* @return flag register value. +* +* This function transmits blocksize number of data from source buffer using interrupt method. +*/ +/* SourceId : SPI_SourceId_006 */ +/* DesignId : SPI_DesignId_006 */ +/* Requirements : HL_SR132 */ +void spiSendData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff) +{ + uint32 index = (spi == spiREG1) ? 0U :((spi==spiREG2) ? 1U : ((spi==spiREG3) ? 2U:((spi==spiREG4) ? 3U:4U))); + +/* USER CODE BEGIN (12) */ +/* USER CODE END */ + + g_spiPacket_t[index].tx_length = blocksize; + g_spiPacket_t[index].txdata_ptr = srcbuff; + g_spiPacket_t[index].g_spiDataFormat = *dataconfig_t; + g_spiPacket_t[index].tx_data_status = SPI_PENDING; + + spi->INT0 |= 0x0200U; + +/* USER CODE BEGIN (13) */ +/* USER CODE END */ +} + + +/** @fn uint32 spiTransmitAndReceiveData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff, uint16 * destbuff) +* @brief Transmits and Receive Data using polling method +* @param[in] spi - Spi module base address +* @param[in] dataconfig_t - Spi DAT1 register configuration +* @param[in] blocksize - number of data +* @param[in] srcbuff - Pointer to the source data ( 16 bit). +* @param[in] destbuff - Pointer to the destination data ( 16 bit). +* +* @return flag register value. +* +* This function transmits and receives blocksize number of data from source buffer using polling method. +*/ +/* SourceId : SPI_SourceId_007 */ +/* DesignId : SPI_DesignId_009 */ +/* Requirements : HL_SR135 */ +uint32 spiTransmitAndReceiveData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff, uint16 * destbuff) +{ + uint16 Tx_Data; + uint32 Chip_Select_Hold = (dataconfig_t->CS_HOLD) ? 0x10000000U : 0U; + uint32 WDelay = (dataconfig_t->WDEL) ? 0x04000000U : 0U; + SPIDATAFMT_t DataFormat = dataconfig_t->DFSEL; + uint8 ChipSelect = dataconfig_t->CSNR; + +/* USER CODE BEGIN (14) */ +/* USER CODE END */ + while(blocksize != 0U) + { + if((spi->FLG & 0x000000FFU) != 0U) + { + break; + } + + if(blocksize == 1U) + { + Chip_Select_Hold = 0U; + } + /*SAFETYMCUSW 45 D MR:21.1 "Valid non NULL input parameters are only allowed in this driver" */ + Tx_Data = *srcbuff; + + spi->DAT1 =((uint32)DataFormat << 24U) | + ((uint32)ChipSelect << 16U) | + (WDelay) | + (Chip_Select_Hold) | + (uint32)Tx_Data; + /*SAFETYMCUSW 567 S MR:17.1,17.4 "Pointer increment needed" */ + srcbuff++; + /*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */ + while((spi->FLG & 0x00000100U) != 0x00000100U) + { + } /* Wait */ + /*SAFETYMCUSW 45 D MR:21.1 "Valid non NULL input parameters are only allowed in this driver" */ + *destbuff = (uint16)spi->BUF; + /*SAFETYMCUSW 567 S MR:17.1,17.4 "Pointer increment needed" */ + destbuff++; + + blocksize--; + } + +/* USER CODE BEGIN (15) */ +/* USER CODE END */ + + return (spi->FLG & 0xFFU); +} + +/* USER CODE BEGIN (16) */ +/* USER CODE END */ + +/** @fn void spiSendAndGetData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff, uint16 * destbuff) +* @brief Initiate SPI Transmits and receive Data using Interrupt mode. +* @param[in] spi - Spi module base address +* @param[in] dataconfig_t - Spi DAT1 register configuration +* @param[in] blocksize - number of data +* @param[in] srcbuff - Pointer to the source data ( 16 bit). +* @param[in] destbuff - Pointer to the destination data ( 16 bit). +* +* Initiate SPI Transmits and receive Data using Interrupt mode.. +*/ +/* SourceId : SPI_SourceId_008 */ +/* DesignId : SPI_DesignId_010 */ +/* Requirements : HL_SR136 */ +void spiSendAndGetData(spiBASE_t *spi, spiDAT1_t *dataconfig_t, uint32 blocksize, uint16 * srcbuff, uint16 * destbuff) +{ + +/* USER CODE BEGIN (17) */ +/* USER CODE END */ + + uint32 index = (spi == spiREG1) ? 0U :((spi==spiREG2) ? 1U : ((spi==spiREG3) ? 2U:((spi==spiREG4) ? 3U:4U))); + + g_spiPacket_t[index].tx_length = blocksize; + g_spiPacket_t[index].rx_length = blocksize; + g_spiPacket_t[index].txdata_ptr = srcbuff; + g_spiPacket_t[index].rxdata_ptr = destbuff; + g_spiPacket_t[index].g_spiDataFormat = *dataconfig_t; + g_spiPacket_t[index].tx_data_status = SPI_PENDING; + g_spiPacket_t[index].rx_data_status = SPI_PENDING; + + spi->INT0 |= 0x0300U; + +/* USER CODE BEGIN (18) */ +/* USER CODE END */ +} + +/** @fn SpiDataStatus_t SpiTxStatus(spiBASE_t *spi) +* @brief Get the status of the SPI Transmit data block. +* @param[in] spi - Spi module base address +* +* @return Spi Transmit block data status. +* +* Get the status of the SPI Transmit data block. +*/ +/* SourceId : SPI_SourceId_009 */ +/* DesignId : SPI_DesignId_013 */ +/* Requirements : HL_SR139 */ +SpiDataStatus_t SpiTxStatus(spiBASE_t *spi) +{ + +/* USER CODE BEGIN (19) */ +/* USER CODE END */ + + uint32 index = (spi == spiREG1) ? 0U :((spi==spiREG2) ? 1U : ((spi==spiREG3) ? 2U:((spi==spiREG4) ? 3U:4U))); + return(g_spiPacket_t[index].tx_data_status); +} + +/* USER CODE BEGIN (20) */ +/* USER CODE END */ + +/** @fn SpiDataStatus_t SpiRxStatus(spiBASE_t *spi) +* @brief Get the status of the SPI Receive data block. +* @param[in] spi - Spi module base address +* +* @return Spi Receive block data status. +* +* Get the status of the SPI Receive data block. +*/ +/* SourceId : SPI_SourceId_010 */ +/* DesignId : SPI_DesignId_014 */ +/* Requirements : HL_SR140 */ +SpiDataStatus_t SpiRxStatus(spiBASE_t *spi) +{ + +/* USER CODE BEGIN (21) */ +/* USER CODE END */ + + uint32 index = (spi == spiREG1) ? 0U :((spi==spiREG2) ? 1U : ((spi==spiREG3) ? 2U:((spi==spiREG4) ? 3U:4U))); + return(g_spiPacket_t[index].rx_data_status); +} + +/* USER CODE BEGIN (22) */ +/* USER CODE END */ + +/** @fn void spiEnableLoopback(spiBASE_t *spi, loopBackType_t Loopbacktype) +* @brief Enable Loopback mode for self test +* @param[in] spi - spi module base address +* @param[in] Loopbacktype - Digital or Analog +* +* This function enables the Loopback mode for self test. +*/ +/* SourceId : SPI_SourceId_011 */ +/* DesignId : SPI_DesignId_011 */ +/* Requirements : HL_SR137 */ +void spiEnableLoopback(spiBASE_t *spi, loopBackType_t Loopbacktype) +{ +/* USER CODE BEGIN (23) */ +/* USER CODE END */ + + /* Clear Loopback incase enabled already */ + spi->IOLPKTSTCR = 0U; + + /* Enable Loopback either in Analog or Digital Mode */ + spi->IOLPKTSTCR = (uint32)0x00000A00U + | (uint32)((uint32)Loopbacktype << 1U); + +/* USER CODE BEGIN (24) */ +/* USER CODE END */ +} + +/* USER CODE BEGIN (25) */ +/* USER CODE END */ + +/** @fn void spiDisableLoopback(spiBASE_t *spi) +* @brief Enable Loopback mode for self test +* @param[in] spi - spi module base address +* +* This function disable the Loopback mode. +*/ +/* SourceId : SPI_SourceId_012 */ +/* DesignId : SPI_DesignId_012 */ +/* Requirements : HL_SR138 */ +void spiDisableLoopback(spiBASE_t *spi) +{ +/* USER CODE BEGIN (26) */ +/* USER CODE END */ + + /* Disable Loopback Mode */ + spi->IOLPKTSTCR = 0x00000500U; + +/* USER CODE BEGIN (27) */ +/* USER CODE END */ +} + +/* USER CODE BEGIN (28) */ +/* USER CODE END */ + +/** @fn spiEnableNotification(spiBASE_t *spi, uint32 flags) +* @brief Enable interrupts +* @param[in] spi - spi module base address +* @param[in] flags - Interrupts to be enabled, can be ored value of: +*/ +/* SourceId : SPI_SourceId_013 */ +/* DesignId : SPI_DesignId_003 */ +/* Requirements : HL_SR129 */ +void spiEnableNotification(spiBASE_t *spi, uint32 flags) +{ +/* USER CODE BEGIN (29) */ +/* USER CODE END */ + + spi->INT0 = (spi->INT0 & 0xFFFF0000U) | flags; + +/* USER CODE BEGIN (30) */ +/* USER CODE END */ +} + +/* USER CODE BEGIN (31) */ +/* USER CODE END */ + +/** @fn spiDisableNotification(spiBASE_t *spi, uint32 flags) +* @brief Enable interrupts +* @param[in] spi - spi module base address +* @param[in] flags - Interrupts to be enabled, can be ored value of: +*/ +/* SourceId : SPI_SourceId_014 */ +/* DesignId : SPI_DesignId_004 */ +/* Requirements : HL_SR130 */ +void spiDisableNotification(spiBASE_t *spi, uint32 flags) +{ +/* USER CODE BEGIN (32) */ +/* USER CODE END */ + + spi->INT0 = (spi->INT0 & (~(flags))); + +/* USER CODE BEGIN (33) */ +/* USER CODE END */ +} + + + + +/** @fn void spi4GetConfigValue(spi_config_reg_t *config_reg, config_value_type_t type) +* @brief Get the initial or current values of the configuration registers +* +* @param[in] *config_reg: pointer to the struct to which the initial or current +* value of the configuration registers need to be stored +* @param[in] type: whether initial or current value of the configuration registers need to be stored +* - InitialValue: initial value of the configuration registers will be stored +* in the struct pointed by config_reg +* - CurrentValue: initial value of the configuration registers will be stored +* in the struct pointed by config_reg +* +* This function will copy the initial or current value (depending on the parameter 'type') +* of the configuration registers to the struct pointed by config_reg +* +*/ +/* SourceId : SPI_SourceId_018 */ +/* DesignId : SPI_DesignId_015 */ +/* Requirements : HL_SR144 */ +void spi4GetConfigValue(spi_config_reg_t *config_reg, config_value_type_t type) +{ + if (type == InitialValue) + { + config_reg->CONFIG_GCR1 = SPI4_GCR1_CONFIGVALUE; + config_reg->CONFIG_INT0 = SPI4_INT0_CONFIGVALUE; + config_reg->CONFIG_LVL = SPI4_LVL_CONFIGVALUE; + config_reg->CONFIG_PC0 = SPI4_PC0_CONFIGVALUE; + config_reg->CONFIG_PC1 = SPI4_PC1_CONFIGVALUE; + config_reg->CONFIG_PC6 = SPI4_PC6_CONFIGVALUE; + config_reg->CONFIG_PC7 = SPI4_PC7_CONFIGVALUE; + config_reg->CONFIG_PC8 = SPI4_PC8_CONFIGVALUE; + config_reg->CONFIG_DELAY = SPI4_DELAY_CONFIGVALUE; + config_reg->CONFIG_FMT0 = SPI4_FMT0_CONFIGVALUE; + config_reg->CONFIG_FMT1 = SPI4_FMT1_CONFIGVALUE; + config_reg->CONFIG_FMT2 = SPI4_FMT2_CONFIGVALUE; + config_reg->CONFIG_FMT3 = SPI4_FMT3_CONFIGVALUE; + } + else + { + /*SAFETYMCUSW 134 S MR:12.2 "LDRA Tool issue" */ + config_reg->CONFIG_GCR1 = spiREG4->GCR1; + config_reg->CONFIG_INT0 = spiREG4->INT0; + config_reg->CONFIG_LVL = spiREG4->LVL; + config_reg->CONFIG_PC0 = spiREG4->PC0; + config_reg->CONFIG_PC1 = spiREG4->PC1; + config_reg->CONFIG_PC6 = spiREG4->PC6; + config_reg->CONFIG_PC7 = spiREG4->PC7; + config_reg->CONFIG_PC8 = spiREG4->PC8; + config_reg->CONFIG_DELAY = spiREG4->DELAY ; + config_reg->CONFIG_FMT0 = spiREG4->FMT0; + config_reg->CONFIG_FMT1 = spiREG4->FMT1; + config_reg->CONFIG_FMT2 = spiREG4->FMT2; + config_reg->CONFIG_FMT3 = spiREG4->FMT3; + } +} + + + + + + + + + + Index: firmware/source/sys_main.c =================================================================== diff -u -r51c6a24b30643c8ce296ebfe1d703f289ffafe97 -r2bb447181c2519690441d81f83563d17e0882ef2 --- firmware/source/sys_main.c (.../sys_main.c) (revision 51c6a24b30643c8ce296ebfe1d703f289ffafe97) +++ firmware/source/sys_main.c (.../sys_main.c) (revision 2bb447181c2519690441d81f83563d17e0882ef2) @@ -66,6 +66,8 @@ #include "Buttons.h" #include "CommBuffers.h" #include "CPLD.h" +#include "DialInFlow.h" +#include "DialOutUF.h" #include "FPGA.h" #include "InternalADC.h" #include "MsgQueues.h" @@ -151,6 +153,8 @@ initCPLD(); initInternalADC(); initBloodFlow(); + initDialInFlow(); + initDialOutUF(); initAlarmLamp(); initButtons(); initWatchdogMgmt();