Index: firmware/App/Controllers/DGInterface.c
===================================================================
diff -u -r95561ae1f450dc687b9ce8d4cce2ac91293bc925 -r6623684ddacf5beebd15bce8a1dbd06a442fb38e
--- firmware/App/Controllers/DGInterface.c	(.../DGInterface.c)	(revision 95561ae1f450dc687b9ce8d4cce2ac91293bc925)
+++ firmware/App/Controllers/DGInterface.c	(.../DGInterface.c)	(revision 6623684ddacf5beebd15bce8a1dbd06a442fb38e)
@@ -71,14 +71,13 @@
 static F32 lgFilteredReservoirWeightInGrams[ NUM_OF_DG_RESERVOIRS ];
 
 // Load cell filtering data
-/// Holds load cell samples for large load cell moving average.
-static F32 lgLoadCellReadings[ NUM_OF_DG_RESERVOIRS ][ SIZE_OF_LARGE_LOAD_CELL_AVG ];
-static U32 lgLoadCellReadingsIdx = 0;                               ///< Index for next sample in large load cell rolling average sample array.
-static F32 lgLoadCellReadingsTotal[ NUM_OF_DG_RESERVOIRS ];         ///< Rolling total - used to calc large load cell moving average.
+static F32 lgLoadCellReadings[ NUM_OF_DG_RESERVOIRS ][ SIZE_OF_LARGE_LOAD_CELL_AVG ];  ///< Holds load cell samples for large load cell moving average.
+static U32 lgLoadCellReadingsIdx = 0;                           ///< Index for next sample in large load cell rolling average sample array.
+static F32 lgLoadCellReadingsTotal[ NUM_OF_DG_RESERVOIRS ];     ///< Rolling total - used to calc large load cell moving average.
 
 // DG Dialysate flow rate
-static F32 dgDialysateFlowRateMlMin = 0.0;                          ///< Latest dialysate flow rate reported by the DG.
-static BOOL dgDialysateFlowDataFreshFlag = FALSE;                   ///< Flag to signal the execDialInFlowMonitor() to process fresh flow rate data
+static volatile F32 dgDialysateFlowRateMlMin = 0.0;             ///< Latest dialysate flow rate reported by the DG.
+static volatile BOOL dgDialysateFlowDataFreshFlag = FALSE;      ///< Flag to signal the execDialInFlowMonitor() to process fresh flow rate data
 
 // Reservoir data
 static DG_RESERVOIR_ID_T dgActiveReservoir = DG_RESERVOIR_2;    ///< Latest active reservoir reported by the DG.
Index: firmware/App/Modes/ModeInitPOST.c
===================================================================
diff -u -r626d9aabbab7db936cc0b2df47417db3692305d1 -r6623684ddacf5beebd15bce8a1dbd06a442fb38e
--- firmware/App/Modes/ModeInitPOST.c	(.../ModeInitPOST.c)	(revision 626d9aabbab7db936cc0b2df47417db3692305d1)
+++ firmware/App/Modes/ModeInitPOST.c	(.../ModeInitPOST.c)	(revision 6623684ddacf5beebd15bce8a1dbd06a442fb38e)
@@ -15,6 +15,7 @@
 *
 ***************************************************************************/
 
+#include "reg_crc.h"       // Used to hold reset reason code at startup before bits get cleared
 #include "reg_system.h"    // Used to access exception status registers for reset reason code at startup
 
 #include "Accel.h"
@@ -53,9 +54,6 @@
 /// Maximum wait time for UI to send its final POST result.
 #define POST_UI_MAX_WAIT_TIME       ( 2 * MS_PER_SECOND / TASK_GENERAL_INTERVAL )
 
-/// Reserved (manually) memory for saved processor reset reason code.
-#define RESET_REASON_CODE_SAVE      (*(volatile uint32 *)0x0802FFFCU)
-
 // ********** private data **********
 
 static HD_POST_STATE_T postState;                               ///< Current state of initialize and POST mode.
@@ -436,7 +434,7 @@
     // when the event data can be sent
     if ( ++startPOSTDelayCounter > START_POST_DELAY_COUNT )
     {
-        U32 resetReason = RESET_REASON_CODE_SAVE | systemREG1->SYSESR;
+        U32 resetReason = systemREG1->SYSESR | crcREG->PSA_SIGREGL1;                         // power-on reset bit preserved in an unused CRC register
 
         systemREG1->SYSESR = systemREG1->SYSESR;                                             // clear reset bit(s) after logging event so subsequent resets can be properly identified as not being power-on resets.
 
Index: firmware/source/sys_startup.c
===================================================================
diff -u -r626d9aabbab7db936cc0b2df47417db3692305d1 -r6623684ddacf5beebd15bce8a1dbd06a442fb38e
--- firmware/source/sys_startup.c	(.../sys_startup.c)	(revision 626d9aabbab7db936cc0b2df47417db3692305d1)
+++ firmware/source/sys_startup.c	(.../sys_startup.c)	(revision 6623684ddacf5beebd15bce8a1dbd06a442fb38e)
@@ -64,11 +64,11 @@
 
 #include "errata_SSWF021_45.h"
 /* USER CODE BEGIN (1) */
+#include "reg_crc.h"
 /* USER CODE END */
 
 
 /* USER CODE BEGIN (2) */
-#define RESET_REASON_CODE_SAVE        (*(volatile uint32 *)0x0802FFFCU)
 /* USER CODE END */
 
 
@@ -134,7 +134,6 @@
 	
 
 /* USER CODE BEGIN (11) */
-    RESET_REASON_CODE_SAVE = 0;
 /* USER CODE END */
 
         /* Workaround for Errata CORTEXR4 66 */
@@ -152,7 +151,7 @@
     if ((SYS_EXCEPTION & POWERON_RESET) != 0U)
     {		
 /* USER CODE BEGIN (12) */
-        RESET_REASON_CODE_SAVE = SYS_EXCEPTION;
+        crcREG->PSA_SIGREGL1 = SYS_EXCEPTION;
 /* USER CODE END */
         /* Add condition to check whether PLL can be started successfully */
         if (_errata_SSWF021_45_both_plls(PLL_RETRIES) != 0U)