Index: leahi_dialin/dd/dialysate_delivery.py =================================================================== diff -u -r1f2bf6d939eb4033dbedb7d7005494cc12fccbc6 -r5994adea1a1022175f9cc4e6dacfa02de3fc45a0 --- leahi_dialin/dd/dialysate_delivery.py (.../dialysate_delivery.py) (revision 1f2bf6d939eb4033dbedb7d7005494cc12fccbc6) +++ leahi_dialin/dd/dialysate_delivery.py (.../dialysate_delivery.py) (revision 5994adea1a1022175f9cc4e6dacfa02de3fc45a0) @@ -21,16 +21,19 @@ from .modules.concentrate_pump import DDConcentratePumps from .modules.conductivity_sensors import DDConductivitySensors from .modules.dialysate_pump import DDDialysatePumps +from .modules.drybicart import DDDryBicart from .modules.events import DDEvents from .modules.gen_dialysate import DDGenDialysate from .modules.heaters import DDHeaters from .modules.levels import DDLevels +from .modules.mixing_cntrl import DDDialysateMixing from .modules.post_gen_dialysate import DDPostGenDialysate from .modules.pressure_sensors import DDPressureSensors from .modules.pre_gen_dialysate import DDPreGenDialysate from .modules.rinse_pump import DDRinsePump +from .modules.records import DDRecords from .modules.spent_chamber_fill import DDSpentChamberFill -from .modules.drybicart import DDDryBicart +from .modules.substitution_pump import DDSubstitutionPump from .modules.temperature_sensors import DDTemperatureSensors from .modules.dd_test_configs import DDTestConfig from .modules.ultrafiltration import DDUltrafiltration @@ -124,6 +127,8 @@ self.concentrate_pumps = DDConcentratePumps(self.can_interface, self.logger) #: The Concentrat Pumps module self.conductivity_sensors = DDConductivitySensors(self.can_interface, self.logger) #: The Conductivity Sensors module self.dialysate_pumps = DDDialysatePumps(self.can_interface, self.logger) #: The Dialysate Pumps module + self.drybicart = DDDryBicart(self.can_interface, self.logger) #: The Dry Bicarb module + self.dialysate_mixing = DDDialysateMixing(self.can_interface, self.logger) #: The Dialysate mixing module self.events = DDEvents(self.can_interface, self.logger) #: The Events module self.gen_dialysate = DDGenDialysate(self.can_interface, self.logger) #: The Generate Dialysate module self.heaters = DDHeaters(self.can_interface, self.logger) #: The Heaters module @@ -132,8 +137,9 @@ self.pressure_sensors = DDPressureSensors(self.can_interface, self.logger) #: The Pressure Sensors module self.pre_gen_dialysate = DDPreGenDialysate(self.can_interface, self.logger) #: The Pre Generate Dialysate module self.rinse_pump = DDRinsePump(self.can_interface, self.logger) #: The Rinse Pump module + self.records = DDRecords(self.can_interface, self.logger) #: The Records (System, Service, Calibration, Institutional, Usage Information) module self.spent_chamber_fill = DDSpentChamberFill(self.can_interface, self.logger) #: The Spent Chamber module - self.drybicart = DDDryBicart(self.can_interface, self.logger) #: The Dry Bicarb module + self.substitution_pump = DDSubstitutionPump(self.can_interface, self.logger) #: The Substitution Pump module self.temperature_sensors = DDTemperatureSensors(self.can_interface, self.logger) #: The Temperature Sensors module self.test_configs = DDTestConfig(self.can_interface, self.logger) #: The Test Configs module self.ultrafiltration = DDUltrafiltration(self.can_interface, self.logger) #: The Ultrafiltration module @@ -217,42 +223,14 @@ result = self.process_into_vars(decoder_list = msg_list, message = message) - if all([len(each) > 0 for each in [result['major'], result['minor'], result['micro'], result['build'], result['compatibility']]]): + if all([each is not None for each in [result['major'], result['minor'], result['micro'], result['build'], result['compatibility']]]): self.dd_version = f"v{result['major']}.{result['minor']}.{result['micro']}-{result['build']}.{result['compatibility']}" self.logger.debug(f'DD VERSION: {self.dd_version}') - if all([len(each) > 0 for each in [result['fpga_id'], result['fpga_major'], result['fpga_minor'], result['fpga_lab']]]): + if all([each is not None for each in [result['fpga_id'], result['fpga_major'], result['fpga_minor'], result['fpga_lab']]]): self.dd_fpga_version = f"v{result['fpga_id']}.{result['fpga_major']}.{result['fpga_minor']}-{result['fpga_lab']}" self.logger.debug(f'DD FPGA VERSION: {self.dd_fpga_version}') - """ - major = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_MAJOR:MsgFieldPositionsFWVersions.END_POS_MAJOR])) - minor = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_MINOR:MsgFieldPositionsFWVersions.END_POS_MINOR])) - micro = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_MICRO:MsgFieldPositionsFWVersions.END_POS_MICRO])) - build = struct.unpack(DataTypes.U16.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_BUILD:MsgFieldPositionsFWVersions.END_POS_BUILD])) - fpga_id = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_FPGA_ID:MsgFieldPositionsFWVersions.END_POS_FPGA_ID])) - fpga_major = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_FPGA_MAJOR:MsgFieldPositionsFWVersions.END_POS_FPGA_MAJOR])) - fpga_minor = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_FPGA_MINOR:MsgFieldPositionsFWVersions.END_POS_FPGA_MINOR])) - fpga_lab = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_FPGA_MICRO:MsgFieldPositionsFWVersions.END_POS_FPGA_MICRO])) - compatibility = struct.unpack(DataTypes.U32.unpack_attrib(), bytearray( - message['message'][MsgFieldPositionsFWVersions.START_POS_COMPATIBILITY_REV:MsgFieldPositionsFWVersions.END_POS_COMPATIBILITY_REV])) - - if all([len(each) > 0 for each in [major, minor, micro, build, compatibility]]): - self.dd_version = f"v{major[0]}.{minor[0]}.{micro[0]}-{build[0]}.{compatibility[0]}" - self.logger.debug(f"DD VERSION: {self.dd_version}") - - if all([len(each) > 0 for each in [fpga_id, fpga_major, fpga_minor, fpga_lab]]): - self.dd_fpga_version = f"v{fpga_id[0]}.{fpga_major[0]}.{fpga_minor[0]}-{fpga_lab[0]}" - self.logger.debug(f"DD FPGA VERSION: {self.dd_fpga_version}") - """ self.dd_version_response_timestamp = timestamp