Index: leahi_dialin/dd/dialysate_delivery.py
===================================================================
diff -u -rc6d2dfdb988298f0264fcb163d8232929bdbe515 -r407868f303202b857482e27fa78108c81c568dd7
--- leahi_dialin/dd/dialysate_delivery.py	(.../dialysate_delivery.py)	(revision c6d2dfdb988298f0264fcb163d8232929bdbe515)
+++ leahi_dialin/dd/dialysate_delivery.py	(.../dialysate_delivery.py)	(revision 407868f303202b857482e27fa78108c81c568dd7)
@@ -32,6 +32,7 @@
 from .modules.spent_chamber_fill import DDSpentChamberFill
 from .modules.substitution_pump import DDSubstitutionPump
 from .modules.drybicart import DDDryBicart
+from .modules.mixing_cntrl import DDDialysateMixing
 from .modules.temperature_sensors import DDTemperatureSensors
 from .modules.dd_test_configs import DDTestConfig
 from .modules.ultrafiltration import DDUltrafiltration
@@ -126,6 +127,7 @@
         self.conductivity_sensors = DDConductivitySensors(self.can_interface, self.logger)  #: The Conductivity Sensors module
         self.dialysate_pumps = DDDialysatePumps(self.can_interface, self.logger)            #: The Dialysate Pumps module
         self.drybicart = DDDryBicart(self.can_interface, self.logger)                       #: The Dry Bicarb module
+        self.dialysate_mixing = DDDialysateMixing(self.can_interface, self.logger)          #: The Dialysate mixing module
         self.events = DDEvents(self.can_interface, self.logger)                             #: The Events module
         self.gen_dialysate = DDGenDialysate(self.can_interface, self.logger)                #: The Generate Dialysate module
         self.heaters = DDHeaters(self.can_interface, self.logger)                           #: The Heaters module
@@ -227,34 +229,6 @@
             self.dd_fpga_version = f"v{result['fpga_id']}.{result['fpga_major']}.{result['fpga_minor']}-{result['fpga_lab']}"
             self.logger.debug(f'DD FPGA VERSION: {self.dd_fpga_version}')
 
-        """
-        major = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_MAJOR:MsgFieldPositionsFWVersions.END_POS_MAJOR]))
-        minor = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_MINOR:MsgFieldPositionsFWVersions.END_POS_MINOR]))
-        micro = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_MICRO:MsgFieldPositionsFWVersions.END_POS_MICRO]))
-        build = struct.unpack(DataTypes.U16.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_BUILD:MsgFieldPositionsFWVersions.END_POS_BUILD]))
-        fpga_id = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_FPGA_ID:MsgFieldPositionsFWVersions.END_POS_FPGA_ID]))
-        fpga_major = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_FPGA_MAJOR:MsgFieldPositionsFWVersions.END_POS_FPGA_MAJOR]))
-        fpga_minor = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_FPGA_MINOR:MsgFieldPositionsFWVersions.END_POS_FPGA_MINOR]))
-        fpga_lab = struct.unpack(DataTypes.U08.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_FPGA_MICRO:MsgFieldPositionsFWVersions.END_POS_FPGA_MICRO]))
-        compatibility = struct.unpack(DataTypes.U32.unpack_attrib(), bytearray(
-            message['message'][MsgFieldPositionsFWVersions.START_POS_COMPATIBILITY_REV:MsgFieldPositionsFWVersions.END_POS_COMPATIBILITY_REV]))
-        
-        if all([len(each) > 0 for each in [major, minor, micro, build, compatibility]]):
-            self.dd_version = f"v{major[0]}.{minor[0]}.{micro[0]}-{build[0]}.{compatibility[0]}"
-            self.logger.debug(f"DD VERSION: {self.dd_version}")
-        
-        if all([len(each) > 0 for each in [fpga_id, fpga_major, fpga_minor, fpga_lab]]):
-            self.dd_fpga_version = f"v{fpga_id[0]}.{fpga_major[0]}.{fpga_minor[0]}-{fpga_lab[0]}"
-            self.logger.debug(f"DD FPGA VERSION: {self.dd_fpga_version}")
-        """
         self.dd_version_response_timestamp = timestamp