Index: FPGA.c
===================================================================
diff -u -r2801d97e877dd78189aa891e80a2f7cf60a6a2b7 -r70a7331db2fcde56b3e47816fa57f5209c66c5f8
--- FPGA.c	(.../FPGA.c)	(revision 2801d97e877dd78189aa891e80a2f7cf60a6a2b7)
+++ FPGA.c	(.../FPGA.c)	(revision 70a7331db2fcde56b3e47816fa57f5209c66c5f8)
@@ -150,6 +150,12 @@
  * The initFPGA function initializes the FPGA unit.
  * @details \b Inputs: none
  * @details \b Outputs: FPGA unit initialized.
+ * @param hdr Pointer to the FPGA header register I/O map record.
+ * @param sen Pointer to the FPGA sensor register I/O map record.
+ * @param act Pointer to the FPGA actuator register I/O map record.
+ * @param hdrSize Size (in bytes) of the FPGA header register I/O map record.
+ * @param senSize Size (in bytes) of the FPGA sensor register I/O map record.
+ * @param actSize Size (in bytes) of the FPGA actuator register I/O map record.
  * @return none
  *************************************************************************/
 void initFPGA( U08* hdr, U08* sen, U08* act, U32 hdrSize, U32 senSize, U32 actSize )
@@ -188,8 +194,8 @@
     fpgaDMAWriteControlRecord.CHCTRL = 0;                        // No chaining
     fpgaDMAWriteControlRecord.ELCNT = 1;                         // Frame is 1 element
     fpgaDMAWriteControlRecord.FRCNT = 0;                         // Block is TBD frames - will be populated later when known
-    fpgaDMAWriteControlRecord.RDSIZE = ACCESS_8_BIT;             // Element size is 1 byte
-    fpgaDMAWriteControlRecord.WRSIZE = ACCESS_8_BIT;             //
+    fpgaDMAWriteControlRecord.RDSIZE = ACCESS_8_BIT;             // Element size is 1 byte for read
+    fpgaDMAWriteControlRecord.WRSIZE = ACCESS_8_BIT;             // Element size is 1 byte for write
     fpgaDMAWriteControlRecord.TTYPE = FRAME_TRANSFER;            // Transfer type is block transfer
     fpgaDMAWriteControlRecord.ADDMODERD = ADDR_INC1;             // Source addressing mode is post-increment
     fpgaDMAWriteControlRecord.ADDMODEWR = ADDR_FIXED;            // Dest. addressing mode is fixed
@@ -477,7 +483,7 @@
 /*********************************************************************//**
  * @brief
  * The handleFPGAWriteAllActuatorsState function handles the FPGA state
- * where the bulk write and read commands are setup for DMA and the builk
+ * where the bulk write and read commands are setup for DMA and the bulk
  * write command transmit to FPGA is initiated.
  * @details \b Inputs: actuator set points
  * @details \b Outputs: fpgaWriteCmdBuffer[], fpgaReadCmdBuffer[]
@@ -667,7 +673,15 @@
     }
     else
     {
+#ifdef _TD_
         SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit )
+#endif
+#ifdef _DD_
+       SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit );
+#endif
+#ifdef _RO_
+       SET_ALARM_WITH_2_U32_DATA( ALARM_ID_RO_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit );
+#endif
     }
 }