Index: FPGA.c
===================================================================
diff -u -r6d80d69a210f45c733e5307859351f2cd820a8e7 -ra63f636c18858c8444d3e4908bb19755b4f2be27
--- FPGA.c	(.../FPGA.c)	(revision 6d80d69a210f45c733e5307859351f2cd820a8e7)
+++ FPGA.c	(.../FPGA.c)	(revision a63f636c18858c8444d3e4908bb19755b4f2be27)
@@ -379,7 +379,7 @@
         default:
             if ( fpgaState >= NUM_OF_FPGA_STATES )
             {
-//                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_IN_STATE, fpgaState )
+                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_IN_STATE, fpgaState )
             }
             else
             {
@@ -423,7 +423,7 @@
         default:
             if ( fpgaState >= NUM_OF_FPGA_STATES )
             {
-//                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_OUT_STATE, fpgaState )
+                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_OUT_STATE, fpgaState )
             }
             else
             {
@@ -703,7 +703,7 @@
     }
     else
     {
-//        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit )
+        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit )
     }
 }
 
@@ -740,7 +740,7 @@
     }
     else
     {
-//        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA, bytes2Receive )
+        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA, bytes2Receive )
     }
 }
 
@@ -777,7 +777,7 @@
     }
     else
     {
-//        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA, bytes2Transmit )
+        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA, bytes2Transmit )
     }
 }
 
@@ -814,7 +814,7 @@
     }
     else
     {
-//        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA, bytes2Receive )
+        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA, bytes2Receive )
     }
 }