Index: FPGA.c =================================================================== diff -u -r82f1fd2a4717d0cd63d512c3132f98ff51e4e63b -r9023ef607793bf8f9e0491da6b84b7da6f8e77de --- FPGA.c (.../FPGA.c) (revision 82f1fd2a4717d0cd63d512c3132f98ff51e4e63b) +++ FPGA.c (.../FPGA.c) (revision 9023ef607793bf8f9e0491da6b84b7da6f8e77de) @@ -30,9 +30,6 @@ #ifdef _DD_ #include "FpgaDD.h" #include "OperationModes.h" -#endif -#ifdef _RO_ -#include "FpgaFP.h" #include "FPOperationModes.h" #endif #include "Messaging.h" @@ -385,9 +382,6 @@ #ifdef _DD_ SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_STATE, fpgaState ) #endif -#ifdef _RO_ - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_FP_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_STATE, fpgaState ) -#endif break; } @@ -685,9 +679,6 @@ #ifdef _DD_ SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit ); #endif -#ifdef _RO_ - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_FP_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit ); -#endif } } @@ -731,9 +722,6 @@ #ifdef _DD_ SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA, bytes2Receive ) #endif -#ifdef _RO_ - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_FP_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA, bytes2Receive ) -#endif } } @@ -777,9 +765,6 @@ #ifdef _DD_ SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA, bytes2Transmit ) #endif -#ifdef _RO_ - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_FP_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA, bytes2Transmit ) -#endif } } @@ -823,9 +808,6 @@ #ifdef _DD_ SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA, bytes2Receive ) #endif -#ifdef _RO_ - SET_ALARM_WITH_2_U32_DATA( ALARM_ID_FP_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA, bytes2Receive ) -#endif } }