Index: FPGA.c
===================================================================
diff -u -r9023ef607793bf8f9e0491da6b84b7da6f8e77de -r4b2d745f569ce6192dc485c389042faf12489d1e
--- FPGA.c	(.../FPGA.c)	(revision 9023ef607793bf8f9e0491da6b84b7da6f8e77de)
+++ FPGA.c	(.../FPGA.c)	(revision 4b2d745f569ce6192dc485c389042faf12489d1e)
@@ -56,11 +56,11 @@
     NUM_OF_FPGA_STATES                                                  ///< Number of FPGA states.
 } FPGA_STATE_T;
 
-#define FPGA_PAGE_SIZE                  512                             ///< FPGA register pages are 256 bytes.
+#define FPGA_PAGE_SIZE                  512                             ///< FPGA register pages are 512 bytes.
 
 #define FPGA_HEADER_START_ADDR          0x0000                          ///< Start address for FPGA header data.
 #define FPGA_BULK_WRITE_START_ADDR      0x0004                          ///< Start address for FPGA continuous priority writes.
-#define FPGA_BULK_READ_START_ADDR       0x0100                          ///< Start address for FPGA continuous priority reads.
+#define FPGA_BULK_READ_START_ADDR       0x0200                          ///< Start address for FPGA continuous priority reads.
 
 #define FPGA_WRITE_CMD_BUFFER_LEN       (FPGA_PAGE_SIZE+8)              ///< FPGA write command buffer byte length.
 #define FPGA_READ_CMD_BUFFER_LEN        8                               ///< FPGA read command buffer byte length.
@@ -84,13 +84,6 @@
 
 #define FPGA_ADC1_AUTO_READ_ENABLE      0x01                            ///< Auto-read enable bit for ADC1 control register.
 
-#define FPGA_BLOOD_LEAK_STATUS_MASK     0x1000                          ///< Bit mask for blood leak detector.
-#define FPGA_BLOOD_LEAK_ST_BIT_INDEX    12                              ///< Bit index for the blood leak self test status bit.
-#define FPGA_BLOOD_LEAK_ZERO_STATE_MASK 0x2000                          ///< Bit mask for blood leak detector zero.
-#define FPAG_BLOOD_LEAK_ZERO_BIT_INDEX  13                              ///< Bit index for the blood leak zero status bit.
-#define FPGA_BLOOD_LEAK_ZERO_CMD        0x02                            ///< Bit for blood leak detector zero command.
-#define FPGA_BLOOD_LEAK_SELF_TEST_CMD   0x01                            ///< Bit for blood leak detector self test command.
-
 // ********** private data **********
 
 // FPGA state