Index: Integrity.c
===================================================================
diff -u -rece40056675b8e5b58b399195e27352458251e91 -r0024f66aaee17890d1229371bf1848420cd8336c
--- Integrity.c	(.../Integrity.c)	(revision ece40056675b8e5b58b399195e27352458251e91)
+++ Integrity.c	(.../Integrity.c)	(revision 0024f66aaee17890d1229371bf1848420cd8336c)
@@ -1,6 +1,23 @@
+/**************************************************************************
+*
+* Copyright (c) 2026-2026 Diality Inc. - All Rights Reserved.
+*
+* THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
+* WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
+*
+* @file    Integrity.c
+*
+* @author  (last)      Dara Navaei
+* @date    (last)      17-Jul-2026
+*
+* @author  (original)  Dara Navaei
+* @date    (original)  09-Apr-2026
+*
+***************************************************************************/
 
-
+#ifndef _VECTORCAST_
 #include <crc_tbl.h>
+#endif
 
 #include "reg_tcram.h"
 
@@ -21,7 +38,9 @@
 
 // ********** private definitions **********
 
+#ifndef _VECTORCAST_
 #define CRC_TABLE_STARTING_ADDR             0x10020             ///< The starting address of CRC table for firmware image.
+#endif
 #define MAX_CRC_CALC_DATA_SIZE              0x8000              ///< The maximum size of data for each CRC calculation.
 #define SERR                                0x00010001          ///< Bit 0 - Single-bit error in TCRAM Module Error Status Register
 #define ADDR_DEC_FAIL                       0x00010004          ///< Bit 2 - Address decode failed in TCRAM Module Error Status Register
@@ -30,6 +49,42 @@
 #define RADDR_PAR_FAIL                      0x00010100          ///< Bit 8 - Read Address Parity Failure in TCRAM Module Error Status Register
 #define WADDR_PAR_FAIL                      0x00010200          ///< Bit 9 - Write Address Parity Failure in TCRAM Module Error Status Register
 
+#ifdef _VECTORCAST_
+// Since VectorCAST does not have access to #include <crc_tbl.h>, the structures are defined here so VectoCAST can compile and
+// instrument the code for Dev testing
+/*********************************************************/
+/* CRC Record Data Structure                             */
+/* NOTE: The list of fields and the size of each field   */
+/*       varies by target and memory model.              */
+/*********************************************************/
+typedef struct crc_record
+{
+uint64_t         crc_value;
+uint32_t         crc_alg_ID;    /* CRC algorithm ID */
+uint32_t         addr;          /* Starting address      */
+uint32_t         size;          /* size of data in bytes */
+uint32_t         padding;       /* explicit padding so layout is the same */
+                                /* for COFF and ELF                       */
+} CRC_RECORD;
+
+/*********************************************************/
+/* CRC Table Data Structure                              */
+/*********************************************************/
+typedef struct crc_table
+{
+uint32_t         rec_size;
+uint32_t         num_recs;
+CRC_RECORD       recs[1];
+} CRC_TABLE;
+
+// Defined a CRC table here since the start address of the CRC table in the firmware will cause a segmentation fault in VectorCAST
+// The CRC_TABLE_STARTING_ADDR in undefined at the top and is defined here again with pointing to the testTable address that has
+// been define here.
+// NOTE: User prefix code was not used because defining the structures at the top would cause compilation errors
+CRC_TABLE testTable;
+#define CRC_TABLE_STARTING_ADDR &testTable
+#endif
+
 /// Time threshold to check RAM error is 2 seconds
 static const U32 RAM_ERROR_CHECK_TIME_THRESHOLD = ( ( 2 * MS_PER_SECOND ) / TASK_GENERAL_INTERVAL );