Index: Integrity.c
===================================================================
diff -u -rfd532326d84dc92f94ae7b4f9310c2c282b313a2 -r9e1286bed0d0c61afd54a3cfeac6ce53c6c96772
--- Integrity.c	(.../Integrity.c)	(revision fd532326d84dc92f94ae7b4f9310c2c282b313a2)
+++ Integrity.c	(.../Integrity.c)	(revision 9e1286bed0d0c61afd54a3cfeac6ce53c6c96772)
@@ -20,14 +20,13 @@
 // ********** private definitions **********
 
 #define CRC_TABLE_STARTING_ADDR             0x10020             ///< The starting address of CRC table for firmware image.
-//#define CRC_TABLE_STARTING_ADDR             0x20                ///< The starting address of CRC table for firmware image. // TODO remove no bootloader version
 #define MAX_CRC_CALC_DATA_SIZE              0x8000              ///< The maximum size of data for each CRC calculation.
-#define SERR                                0x00000001          ///< Bit 0 - Single-bit error in TCRAM Module Error Status Register
-#define ADDR_DEC_FAIL                       0x00000004          ///< Bit 2 - Address decode failed in TCRAM Module Error Status Register
-#define ADDR_COMP_LOGIC_FAIL                0x00000010          ///< Bit 4 - Address decode logic element failed in TCRAM Module Error Status Register
-#define DERR                                0x00000020          ///< Bit 5 - Multiple bit error in TCRAM Module Error Status Register
-#define RADDR_PAR_FAIL                      0x00000100          ///< Bit 8 - Read Address Parity Failure in TCRAM Module Error Status Register
-#define WADDR_PAR_FAIL                      0x00000200          ///< Bit 9 - Write Address Parity Failure in TCRAM Module Error Status Register
+#define SERR                                0x00010001          ///< Bit 0 - Single-bit error in TCRAM Module Error Status Register
+#define ADDR_DEC_FAIL                       0x00010004          ///< Bit 2 - Address decode failed in TCRAM Module Error Status Register
+#define ADDR_COMP_LOGIC_FAIL                0x00010010          ///< Bit 4 - Address decode logic element failed in TCRAM Module Error Status Register
+#define DERR                                0x00010020          ///< Bit 5 - Multiple bit error in TCRAM Module Error Status Register
+#define RADDR_PAR_FAIL                      0x00010100          ///< Bit 8 - Read Address Parity Failure in TCRAM Module Error Status Register
+#define WADDR_PAR_FAIL                      0x00010200          ///< Bit 9 - Write Address Parity Failure in TCRAM Module Error Status Register
 
 /// Time threshold to check RAM error is 2 seconds
 static const U32 RAM_ERROR_CHECK_TIME_THRESHOLD = ( ( 2 * MS_PER_SECOND ) / TASK_GENERAL_INTERVAL );