Index: firmware/source/can.c =================================================================== diff -u -rf3646622112ca7402527b541766b92a6560f2b17 -re7528bc3938f0ef6e05960045e24dc91ac87f344 --- firmware/source/can.c (.../can.c) (revision f3646622112ca7402527b541766b92a6560f2b17) +++ firmware/source/can.c (.../can.c) (revision e7528bc3938f0ef6e05960045e24dc91ac87f344) @@ -104,9 +104,9 @@ * - Disable status interrupts * - Enter initialization mode */ - canREG1->CTL = (uint32)0x00000000U + canREG1->CTL = (uint32)0x00000200U | (uint32)0x00000000U - | (uint32)((uint32)0x00000005U << 10U) + | (uint32)((uint32)0x0000000AU << 10U) | (uint32)0x00020043U; /** - Clear all pending error flags and reset current status */ @@ -180,7 +180,7 @@ | (uint32)0x00000000U; /** - Setup auto bus on timer period */ - canREG1->ABOTR = (uint32)0U; + canREG1->ABOTR = (uint32)1040000U; /** - Initialize message 1 * - Wait until IF1 is ready for use @@ -196,8 +196,8 @@ } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x1U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x1U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 1U; @@ -215,8 +215,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x2U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x2U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 2U; @@ -234,8 +234,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x4U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x4U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 3U; @@ -253,8 +253,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x08U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x08U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 4U; @@ -272,8 +272,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x20U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x20U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 5U; @@ -291,8 +291,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x21U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x21U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 6U; @@ -310,8 +310,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x100U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x100U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 7U; @@ -329,8 +329,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x101U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x101U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 8U; @@ -348,8 +348,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x102U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x102U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 9U; @@ -367,8 +367,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x103U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x103U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 10U; @@ -386,8 +386,8 @@ { } /* Wait */ - canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x404U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x404U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF1CMD = (uint8) 0xF8U; canREG1->IF1NO = 11U; @@ -405,8 +405,8 @@ { } /* Wait */ - canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x1FFFFFFFU) << (uint32)0U); - canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x40000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x405U & (uint32)0x1FFFFFFFU) << (uint32)0U); + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x405U & (uint32)0x000007FFU) << (uint32)18U); canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 12U; @@ -439,10 +439,10 @@ * - Setup baud rate prescaler */ canREG1->BTR = (uint32)((uint32)0U << 16U) | - (uint32)((uint32)(6U - 1U) << 12U) | - (uint32)((uint32)((3U + 6U) - 1U) << 8U) | - (uint32)((uint32)(4U - 1U) << 6U) | - (uint32)25U; + (uint32)((uint32)(2U - 1U) << 12U) | + (uint32)((uint32)((3U + 2U) - 1U) << 8U) | + (uint32)((uint32)(2U - 1U) << 6U) | + (uint32)51U; /** - CAN1 Port output values */