Index: firmware/App/Services/FpgaTD.c
===================================================================
diff -u -r61456322255a686365146e88f79ffc61d00edb6c -r5c0b7c734daaa5a3ee29d4948a8dcc17195572f9
--- firmware/App/Services/FpgaTD.c	(.../FpgaTD.c)	(revision 61456322255a686365146e88f79ffc61d00edb6c)
+++ firmware/App/Services/FpgaTD.c	(.../FpgaTD.c)	(revision 5c0b7c734daaa5a3ee29d4948a8dcc17195572f9)
@@ -69,9 +69,7 @@
 #define FPGA_AIRTRAP_LEVEL_LOW_MASK      0x0008                                 ///< Bit mask for air trap lower level sensor.
 #define FPGA_AIRTRAP_LEVEL_HIGH_MASK     0x0004                                 ///< Bit mask for air trap upper level sensor.
 
-#define FPGA_ADA_BUBBLE_STATUS_MASK      0x0001                                 ///< Bit mask for arterial air bubble detector input status.
 #define FPGA_ADV_BUBBLE_STATUS_MASK      0x0002                                 ///< Bit mask for venous air bubble detector input status.
-#define FPGA_ADA_BUBBLE_SELF_TEST_CMD    0x04                                   ///< Bit for arterial air bubble detector self-test command.
 #define FPGA_ADV_BUBBLE_SELF_TEST_CMD    0x08                                   ///< Bit for venous air bubble detector self-test command.
 
 #define FPGA_PBO_TEMP_DIVISOR            2047.0F                                ///< Used in conversion of PBo temperature reading to deg C.
@@ -80,6 +78,7 @@
 
 // FPGA Sensors Record
 #pragma pack(push,1)
+
 /// Record structure for FPGA header read.
 typedef struct
 {
@@ -133,6 +132,8 @@
     U16 alarmBuzzerCurrentAdc;                  ///< Reg 328.  Alarm buzzer current ADC reading.
     U16 fpgaVccInternalAdc;                     ///< Reg 330.  FPGA Vcc internal voltage ADC reading.
     U16 fpgaCompatibilityRev;                   ///< Reg 332.  Compatibility revision.
+    U08 VBTStatus;                              ///< Reg 334.  VBT status register.
+    U08 VBTStatusPWM;                           ///< Reg 335.  VBT PWM status register.
 } FPGA_SENSORS_T;
 
 /// Record structure for FPGA continuous priority writes.
@@ -156,7 +157,12 @@
     U16 VBVStepSpeed;                           ///< Reg 30.  VBV step speed set register.
     U16 VBAStepSpeed;                           ///< Reg 32.  VBA step speed set register.
     U08 alarmControl;                           ///< Reg 34.  Alarm audio register.
+    U08 reserved1;                              ///< Reg 35.  Reserved.
+    U32 reserved2;                              ///< Reg 36.  Reserved.
+    U32 reserved3;                              ///< Reg 40.  Reserved.
+    U08 sensorTest;                             ///< Reg 44.  Sensor self-test control register.
 } FPGA_ACTUATORS_T;
+
 #pragma pack(pop)
 
 // ********** private data **********
@@ -628,7 +634,7 @@
  *************************************************************************/
 void setFPGAVenousBubbleSelfTest( void )
 {
-    //fpgaActuatorSetPoints.fpgaSensorTest |= FPGA_ADV_BUBBLE_SELF_TEST_CMD;
+    fpgaActuatorSetPoints.sensorTest |= FPGA_ADV_BUBBLE_SELF_TEST_CMD;
 }
 
 /*********************************************************************//**
@@ -641,7 +647,7 @@
  *************************************************************************/
 void clearFPGAVenousBubbleSelfTest( void )
 {
-    //fpgaActuatorSetPoints.fpgaSensorTest &= ~FPGA_ADV_BUBBLE_SELF_TEST_CMD;
+    fpgaActuatorSetPoints.sensorTest &= ~FPGA_ADV_BUBBLE_SELF_TEST_CMD;
 }
 
 /*********************************************************************//**