Index: firmware/App/Services/FpgaTD.c
===================================================================
diff -u -r73d8423edc56daed591bc0b3f7baee5540aea423 -rf688e0f8bded1f0a687437e3136cfba8b14f87b6
--- firmware/App/Services/FpgaTD.c	(.../FpgaTD.c)	(revision 73d8423edc56daed591bc0b3f7baee5540aea423)
+++ firmware/App/Services/FpgaTD.c	(.../FpgaTD.c)	(revision f688e0f8bded1f0a687437e3136cfba8b14f87b6)
@@ -262,13 +262,13 @@
         else
         {
             result = SELF_TEST_STATUS_FAILED;
-            SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_POST_TEST_FAILED, (U32)HD_FPGA_COMPATIBILITY_REV, (U32)fpgaSensorReadings.fpgaCompatibilityRev )
+            SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_FPGA_POST_TEST_FAILED, (U32)HD_FPGA_COMPATIBILITY_REV, (U32)fpgaSensorReadings.fpgaCompatibilityRev )
         }
     }
     else
     {
         result = SELF_TEST_STATUS_FAILED;
-        SET_ALARM_WITH_1_U32_DATA( ALARM_ID_HD_FPGA_POST_TEST_FAILED, (U32)fpgaHeader.fpgaId )
+        SET_ALARM_WITH_1_U32_DATA( ALARM_ID_TD_FPGA_POST_TEST_FAILED, (U32)fpgaHeader.fpgaId )
     }
 
     return result;
@@ -311,7 +311,7 @@
         {
             if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_CLOCK_SPEED_ERROR ) )
             {
-                 SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_CLOCK_SPEED_CHECK_FAILURE, diffFPGATimerCount, diffTimerCount );
+                 SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_FPGA_CLOCK_SPEED_CHECK_FAILURE, diffFPGATimerCount, diffTimerCount );
             }
         }
     }
@@ -1582,7 +1582,7 @@
     {
         if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_COMM_FAILURES ) )
         {
-            SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_COMM_TIMEOUT, MAX_FPGA_COMM_FAILURES, (U32)fpgaSensorReadings.errorCountProcessor )
+            SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_FPGA_COMM_TIMEOUT, MAX_FPGA_COMM_FAILURES, (U32)fpgaSensorReadings.errorCountProcessor )
         }
     }
 }
@@ -1608,7 +1608,7 @@
         {
             if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_COMM_FAILURES ) )
             {
-                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_COMM_TIMEOUT, MAX_FPGA_COMM_FAILURES, (U32)fpgaSensorReadings.errorCountProcessor )
+                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_TD_FPGA_COMM_TIMEOUT, MAX_FPGA_COMM_FAILURES, (U32)fpgaSensorReadings.errorCountProcessor )
                 status = TRUE;
             }
         }