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Last Commit: 19 Nov 25
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Friday 18 Nov 2022
4:49 pm

Dara Navaei

2:18 pm

jtaylor  (deleted user)

Is this a placeholder? Should have a "TODO" comment for the planned updates. Are the flow profiles intended to change eventually? Do some of these states have different pump load conditions? Test/t...

Is this a placeholder? Should have a "TODO" comment for the planned updates. Are the flow profiles intended to change eventually? Do some of these states have different pump load conditions? Test/tuning plans? Where will setROPIFlowProfile() be called? etc.

Thursday 17 Nov 2022
11:45 am

Dara Navaei

DG-DEN-14197_SW S83 MG PI Optimizations
DG-DEN-14197_SW S83 MG PI Optimizations
11:44 am

Dara Navaei

HD-DEN-14197_SW S83 MG PI Optimization
HD-DEN-14197_SW S83 MG PI Optimization
Tuesday 15 Nov 2022
9:27 am

Dara Navaei

DG-DEN-14316_Chemical Disinfect
DG-DEN-14316_Chemical Disinfect
Sunday 13 Nov 2022
7:29 pm

Dara Navaei

HD-DEN-14307_DG HD Dev HD DG Dvt Update Part 6
HD-DEN-14307_DG HD Dev HD DG Dvt Update Part 6
Thursday 10 Nov 2022
10:36 am

Dara Navaei

10:32 am

Sean Nash and wbracken  (deleted user)

Wednesday 09 Nov 2022
1:59 pm

Sean Nash

RESOLVED in CODE WALKTHROUGH.

RESOLVED in CODE WALKTHROUGH.

1:56 pm

Sean Nash

RESOLVED in CODE WALKTHROUGH.

RESOLVED in CODE WALKTHROUGH.

1:55 pm

Sean Nash

RESOLVED in CODE WALKTHROUGH.

RESOLVED in CODE WALKTHROUGH.

1:54 pm

Sean Nash

RESOLVED in CODE WALKTHROUGH.

RESOLVED in CODE WALKTHROUGH.

1:54 pm

Sean Nash

RESOLVED in CODE WALKTHROUGH.

RESOLVED in CODE WALKTHROUGH.

1:23 pm

Dara Navaei

Done.

Done.

1:13 pm

Dara Navaei

Done

Done

1:12 pm

Dara Navaei

Done.

Done.

1:11 pm

Dara Navaei

Done.

Done.

8:44 am

Sean Nash

Still doesn't belong here. We can either have a new shared FPGA header file or we can have two of these - one for each sub-system (similar to how we have two FPGA.c/.h files).

Still doesn't belong here. We can either have a new shared FPGA header file or we can have two of these - one for each sub-system (similar to how we have two FPGA.c/.h files).

8:41 am

Sean Nash

Doesn't this command take a pointer to a structure now?

Doesn't this command take a pointer to a structure now?

Monday 07 Nov 2022
11:27 am

Dara Navaei

This is here so both stacks can use it.

This is here so both stacks can use it.

11:27 am

Dara Navaei

Done.

Done.

10:44 am

Sean Nash

Why is this in utilities module? Doesn't it make more sense in fpga module?

Why is this in utilities module? Doesn't it make more sense in fpga module?

10:43 am

Sean Nash

RESOLVED in CODE WALKTHROUGH.

RESOLVED in CODE WALKTHROUGH.

10:42 am

Sean Nash

Remove blank line.

Remove blank line.

10:41 am

Sean Nash

None of these structures appear to require packing - all 32-bit fields.

None of these structures appear to require packing - all 32-bit fields.

10:40 am

wbracken  (deleted user)

RESOLVED IN CODE WALKTHROUGH

RESOLVED IN CODE WALKTHROUGH

10:40 am

Sean Nash

If this message is for DG CPLD only, should change enum to "MSG_ID_DG_CPLD_...".

If this message is for DG CPLD only, should change enum to "MSG_ID_DG_CPLD_...".

10:39 am

Sean Nash

RESOLVED in CODE WALKTHROUGH.

RESOLVED in CODE WALKTHROUGH.

10:36 am

wbracken  (deleted user)

RESOLVED IN CODE WALKTHROUGH

RESOLVED IN CODE WALKTHROUGH

10:21 am

wbracken  (deleted user)

Looks like blank line is still there.

Looks like blank line is still there.