Should OR ( |= instead of = ) this bit into register so we don't interfere with other bits that may have been set by other drivers (e.g. bubble detector).
My mistake. i was thinking the parameters 'origin_uf_rate' and 'origin_uf_volume' need to be reworded since its now the Prescribed Ultrafiltration volume/rate
This start time was last set in setup function - quite some time ago. So this will have immediately timed out the first time we get here. I think this still works though.
I imagine this state would need to look for zero to complete within some time period so we can tell FPGA to put sensor in self-test mode and set your state machine to self-test state. Fault if times out.
Bill, I think this #ifndef is here because this test will fail if you are debugging and ever stop for a break point (FPGA timer keeps going but processor timer stops). So the idea here is that this test only runs on a release build.
After the change in the messaging structure these codes were not working so I commented them out to let the simulator work. But kept as the guidelines of how the implementation needs to change. Also, there's a comment to update then with the new messaging. Put the TODO comment.
