This is HD side so not VDr. I got this abbreviation from HD HDD. My flow path diagram has these two valves as VDi and VDo (for bypassing the dialyzer). HDD has VDio and VDzr. Not sure why the discrepancy, but I think it makes sense to follow HDD for FPGA register names.
PEP8 E302: Two blank lines are expected between functions and classes. PEP8 E303: Two blank lines are expected between functions and classes and one blank line is expected between methods of a class.
